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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
TC6374AF (3in1 ATA)
PC Card ATA to SD Memory Card, MultiMediaCard and SmartMediaTM Controller
1. Outline
TC6374AF is an SD memory card / MultimediaCard / SmartMediaTM controller with PC Card ATA bus interface. memory. 3 in 1 PC Card ATA adapter card can be easily realized with a firmware-installed NOR flash
2. Features
PC Card ATA controller
Conforms to PC Card '97 Standard Conforms to ATA/ATAPI-5 Standard T13 1321 Conforms to SD Card Association "SD Card PC Card Adopter - Media Card Pass Throug" Supports 8/16 bit access Power mode: 4 states (Sleep, Standby, Idle, Active) Supports Auto power down Supports Windows standard ATA driver
(R)
SD Memory Card controller
Conforms to SD Memory Card "Physical Layer Specification 1.0" Supports 4 bit MultiMediaCard mode interface Supports Write protect function Supports Unique ID Read
MultiMediaCard controller
Conforms to MultiMediaCard "System Specification 2.2" Supports 1 bit MultiMediaCard mode interface Supports Unique ID Read
SmartMediaTM Controller
Conforms to SSFDC Forum "SmartMediaTM Physical Format" Supports 3.3V 1M - 128M SmartMediaTM Supports 3.3V 4M - 128M MROM SmartMediaTM, MROM automatic recognition function TOTAL 125 PAGE NO. 1
TC6374AF Hardware Datasheet
Supports Wear Leveling function Supports Write protect function Supports ECCfunction (1 bit error correction / 2 bit error detect) Supports Unique ID Read
Rev. 1.22
02/2/15
Controller firmware
Installed on NORtype flash memory Supports Firmware Update Supply Firmware Object Licence free
Operation Voltage
Host Interface: Media Interface: Internal: 3.3V / 5V 3.3V 3.3V
Package
Can be installed in PC Card Type II 128-pin LQFP (Lead pitch: 0.4 mm)
3. Notes on Usage
#1, Take a note on the information listed in the solid line frame at the bottom of this page. #2, Be sure to refer to the specification: "6-7. Notes on 3in1 PC Card ATA adapter". #3, In the system design, refer to the attached document: "Description on TC6374AF reference design (reference circuit diagram and information sheet)". These reference documents are updated time by time, therefore be sure to check the latest information by inquiry. #4, SmartMediaTM is a registered trademark of Toshiba. #5, Microsoft and Windows are a registered trademark of Microsoft Corporation in the United States and other countries. Copyright(c) 1995 Microsoft Corporation. All Rights Reserved. Portion Copyright(c) 1995 Microsoft Corporation #6, In addition, system and product names referred to in this document are generally a registered trade mark or trade mark of respective developer or maker. Note that, in this document, marks such as TM or be omitted. This data sheet is an interrim version arranging the target specification of products. Note that the specificvation may be modified as necessary in the convenience of developmemt. Copying by user is strictry prohibited in view of the confidentiality control. If additional copies are required, contact with us so that we will prepare them by ourselves. If the board design is based on this data sheet, contact with the Marketing staff in advance.
(R)
may
TOTAL 125
PAGE NO. 2
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
4. Contents
1. Outline............................................................................................................................................................ 1 2. Features ......................................................................................................................................................... 1 3. Notes on Usage ............................................................................................................................................. 2 4. Contents ......................................................................................................................................................... 3 5. Pin assignment table...................................................................................................................................... 6 5-1. Pin assignment table 1............................................................................................................................ 6 5-2. Pin assignment table 2............................................................................................................................ 7 5-3. Pin assignment table 3............................................................................................................................ 8 5-4. Pin assignment table 4............................................................................................................................ 9 5-5. Pin assignment table 5.......................................................................................................................... 10 6. Pin description.............................................................................................................................................. 11 6-1. Host interface 1 ..................................................................................................................................... 11 6-2. Host interface 2 ..................................................................................................................................... 12 6-3. SD memory card/ MultiMediaCard/ SmartMediaTM/ NOR flash memory interface 1............................ 13 6-4. SD memory card/ MultiMediaCard/ SmartMediaTM/ NOR flash memory interface 2............................ 14 6-5. Others ................................................................................................................................................... 15 6-6. Oscillation Circuit .................................................................................................................................. 16 6-7. Notes on 3in1 PC Card ATA adapter..................................................................................................... 17 7. Operational descryption ............................................................................................................................... 18 7-1. Outline of Interface................................................................................................................................ 18 7-2. Example of system configuration .......................................................................................................... 18 7-3. Host interface ........................................................................................................................................ 19 7-4. PC Card interface ................................................................................................................................. 19 7-5. Register description .............................................................................................................................. 29 8. ATA COMMAND ........................................................................................................................................... 45 8-1. ATA COMMAND BLOCK....................................................................................................................... 45 8-2. Operation of ATA COMMAND BLOCK REGISTER .............................................................................. 45 8-3. ATA COMMAND CODE and PARAMETERS........................................................................................ 46 8-3-1. STANDARD ATA COMMAND ............................................................................................................ 46 8-3-2. VENDOR UNIQUE COMMAND ........................................................................................................ 47 8-4. Error indication report of ATA COMMAND ............................................................................................ 48 8-5. General description of ATA COMMAND............................................................................................... 49 8-5-1. STANDARD ATA COMMAND ............................................................................................................ 49 8-5-2. VENDOR UNIQUE ATA COMMAND ................................................................................................. 86 9. Reset operation............................................................................................................................................ 99 9-1. Hardware rest by #PONRST terminal................................................................................................... 99 9-2. Hardware reset by RESET terminal...................................................................................................... 99 9-3. Software reset by FCR Configuration Option Register:SRESET "D7" bit............................................. 99 9-4. Software reset by ATA Device Control Register:SRST "D2" bit ............................................................ 99 10. Control of low power consumption........................................................................................................... 100 11. NOR flash memory................................................................................................................................... 101 TOTAL 125 PAGE NO. 3
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
12. Removable media memory capacity........................................................................................................ 102 12-1. SmartMediaTM ................................................................................................................................... 102 12-2. SD Memory Card/ MultiMediaCard ................................................................................................... 102 13. Recognizing the removable media........................................................................................................... 103 13-1. SmartMediaTM ................................................................................................................................... 103 13-2. SD Memory Card/MultiMediaCard .................................................................................................... 104 14. Others ...................................................................................................................................................... 105 14-1. System Performance ........................................................................................................................ 105 14-2. The Calculation of Read and Write Performance ............................................................................. 106 14-3. Setup Time ........................................................................................................................................ 110 14-4. PC Card ATA Power Consumption of TC6374AF ............................................................................. 110 14-5. MTBF .................................................................................................................................................111 14-6. ECC....................................................................................................................................................111 14-7. Reliability............................................................................................................................................111 15. Absolute maximum ratings (VSS = 0V) ..................................................................................................... 112 16. Standard operation condition (VSS = 0V).................................................................................................. 112 17. DC electrical characteristic ...................................................................................................................... 113 18. AC characteristics .................................................................................................................................... 114 18-1. PC Card interface ............................................................................................................................. 114 18-2. SmartMediaTM interface .................................................................................................................... 116 18-3. SD Memory Card/ MultiMediaCard interface .................................................................................... 117 18-4. NOR flash memory interface............................................................................................................. 118
18-4-1. Fujitsu (AMD) NOR flash memory interface .......................................................................... 118 18-4-2. Sharp (Intel) NOR flash memory interface ............................................................................ 119
18-5. Clock input condition......................................................................................................................... 120 18-6. Reset input condition ........................................................................................................................ 121 19. Reset sequence ....................................................................................................................................... 122 20. Package outline........................................................................................................................................ 123
TOTAL 125
PAGE NO. 4
TC6374AF Hardware Datasheet
[Notice] #1. This product conforms to PC Card '97 Standard.
Rev. 1.22
02/2/15
#2. This product conforms to SmartMediaTM Physical format specification standardized and recommended by SSFDC Forum. #3. This product conforms to ATA/ATAPI-5 standard. #4. Voltage level indication differs per input/output signal. #5. "Hi-Z" used in this document represents the High impedance state.
Voltage level VDD VSS Input signal "1" "0" Output signal "H" "L"
TOTAL 125
PAGE NO. 5
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
5. Pin assignment table
5-1. Pin assignment table 1
For marks in the table, refer to the footnotes below the table.
NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 O O I O O O O O O I O O I I/O O O O O O I O O O Symbol VDD3.3 #NOR_CE #NOR_OE #NOR_WE NOR_A0 NOR_A1 VSS #NOR_BSY #NOR_RP NOR_A2 NOR_A3 VSS NOR_A4 NOR_A5 SH/#FJ VSS VDD3.3 NOR_A6 NOR_A7 NOR_A8 NOR_A9 VSS NOR_A10 NOR_A11 FPSD VDD3.3 VSS NOR_A12 NOR_A13 SDWP Note Input Buffer LVTTL, S LVTTL TEST IN LVTTL TEST IN LVTTL Output Buffer B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4 -
I: O: B: Notice: Buffer Type
Input Output Bidirection LVTTL: 3V LVTTL level (same with 5V) B4/B8IF: 3V= B4, 5V= B8IF PU: Pulled-up O (Tri): Tri-state
S: Schmidt PD: Pulled-down
TEST IN: Should be tied to VDD3.3 or VSS specified in Symbol column.
TOTAL 125
PAGE NO. 6
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
5-2. Pin assignment table 2
NO. 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 O (Tri) I I I B B O (Tri) I I I I I I/O I B B B B I I I Symbol VSS VDD3.3 VDD #FCD D10 D2 D9 D1 VSS #CD A3 NC A0 VSS #IOIS16 (WP) A1 #REG A2 VDD D8 D0 #INPACK A4 VSS RESET A5 A6 VDD3.3 VSS #WE Note Input Buffer LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL, S LVTTL LVTTL LVTTL LVTTL, PU LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL, S, PU Output Buffer B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF -
I: O: B: Notice: Buffer Type
Input Output Bidirection LVTTL: 3V LVTTL level (same with 5V) B4/B8IF: 3V= B4, 5V= B8IF PU: Pulled-up O (Tri): Tri-state
S: Schmidt PD: Pulled-down
TEST IN: Should be tied to VDD3.3 or VSS specified in Symbol column.
TOTAL 125
PAGE NO. 7
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
5-3. Pin assignment table 3
NO. 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 I/O I I I I I I I I B B B B B B I B B B B I Symbol #IOWR A7 NC VSS VDD A8 #IORD #OE #CE2 VSS #CE1 A9 D15 D7 D14 VSS D6 D13 D5 VDD VDD3.3 A10 VSS VSS D12 VSS D4 D11 D3 SELBSY Note Input Buffer LVTTL, S, PU LVTTL LVTTL LVTTL, S, PU LVTTL, S, PU LVTTL, PU LVTTL, PU LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL TEST IN TEST IN LVTTL LVTTL LVTTL LVTTL LVTTL, PD Output Buffer B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF B4/B8IF -
I: O: B: Notice: Buffer Type
Input Output Bidirection LVTTL: 3V LVTTL level (same with 5V) B4/B8IF: 3V= B4, 5V= B8IF PU: Pulled-up O (Tri): Tri-state
S: Schmidt PD: Pulled-down
TEST IN: Should be tied to VDD3.3 or VSS specified in Symbol column.
TOTAL 125
PAGE NO. 8
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
5-4. Pin assignment table 4
NO. 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 I/O I O (Tri) I O O O O I O (Tri) O (Tri) B B B B B O I O Symbol VSS #PONRST VSS #IREQ (READY) VSS VDD VDD3.3 XI XO VSS OSCOUT VDD3.3 FCLE / MMCLK FALE #FBSY #FCE #FRE VSS FD4 FD5 FD6 FD7 VDD VDD3.3 VSS #FWE / MMCMD #FWP VSS RMCLK OCTL Note Input Buffer LVTTL, S TEST IN TEST IN CLOCK IN LVTTL, S LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL, S Output Buffer B4/B8IF CLOCK OUT B4 B8 B4 B4 B4 B4 B4 B4 B4 B4 B4 B4
I: O: B: Notice: Buffer Type
Input Output Bidirection LVTTL: 3V LVTTL level (same with 5V) B4/B8IF: 3V= B4, 5V= B8IF PU: Pulled-up O (Tri): Tri-state
S: Schmidt PD: Pulled-down
TEST IN: Should be tied to VDD3.3 or VSS specified in Symbol column.
TOTAL 125
PAGE NO. 9
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
5-5. Pin assignment table 5
NO. 121 122 123 124 125 126 127 128 I/O O I B B B B Symbol OUTCLK MCLK VSS FD0 FD1 FD2 FD3 VSS Note Input Buffer LVTTL, S LVTTL LVTTL LVTTL LVTTL Output Buffer B4 B4 B4 B4 B4 -
I: O: B: Notice: Buffer Type
Input Output Bidirection LVTTL: 3V LVTTL level (same with 5V) B4/B8IF: 3V= B4, 5V= B8IF PU: Pulled-up O (Tri): Tri-state
S: Schmidt PD: Pulled-down
TEST IN: Should be tied to VDD3.3 or VSS specified in Symbol column.
TOTAL 125
PAGE NO. 10
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6. Pin description
6-1. Host interface 1
Pin name VDD Pin number 33,49,65,80,96, 113 VDD3.3 1,17,26,32,58,81, 97,102,114, VSS 7,12,16,22,27,31, 39,44,54,59,64, 70,76,83,84,86, 91,93,95,100, 108,115,118,123, 128 NC RESET 42,63 55 I NON CONNECTION CARD RESET An open terminal. Keep it in the open state. A reset terminal. If set to "1", all the internal states including FCR are initialized. Set to the reset state if an edge moved to the assert state is detected, and reset is cleared if the negate state is detected. If, when SD Memory Card is used, this terminal is cleared from "1" to "0", CMD0 for media reset is issued two times. Data bus of 16-bit width (2 bytes). D15 is MSB and D0 is LSB. Normally, this bus is set to the input state and, only if read by the host, set to the output state. Address bus. A10 is MSB and A0 is LSB. In TC6374AF, maximum number of address is 11. Number of decodes differ per mode. In word access, A0 is disabled. Set to "1", Memory Mapped mode allows accessing I/O space with #OE and #WE. If #REG set to "0", CIS and FCR can be accessed by #OE and #WE, or by #IORD and #IOWR, I/O space in each mode of Independent I/O, Primary/Secondary can be accessed.(with pull-up resistor) Set to "0" if accessed by host via D7 - D0 (with pull-up resistor) Set to "0" if accessed by host via D15 - D8. Odd number addresses only can be accessed from D15 - D8 irrespective of A0 (with pull-up resistor) Used to read I/O space in the CIS, FCR and Memory Mapped modes. In the write operation, this terminal shall be disabled (with pull-up resistor) Used to write I/O space in the FCR and Memory Mapped mode (with pull-up resistor) GROUND A ground terminal. POWER SUPPLY A power terminal other than PC card interface circuit. I/O Pin function POWER SUPPLY Functional description A power terminal for PC card interface circuit.
D15 - D0
73,75,78,85,88, 35,37,50,74,77, 79,87,89,36,38,51
B
DATA BUS
A10 - A0
82,72,66,62,57, 56,53,41,48,46,43
I
ADDRESS BUS
#REG
47
I
ATTRIBUTE MEMORY SELECT
#CE1 #CE2
71 69
I I
CARD ENABLE 1 CARD ENABLE 2
#OE
68
I
OUTPUT ENABLE WRITE ENABLE
#WE
60
I
TOTAL 125
PAGE NO. 11
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6-2. Host interface 2
Pin name #IORD Pin number 67 I/O I Pin function I/O READ Functional description Used to read I/O space in Independent I/O, Primary and Secondary modes. In other modes than above, this terminal is disabled (with pull-up resistor) Used to write to I/O space in Independent I/O, Primary and Secondary modes. In other modes than above, this terminal is disabled (with pull-up resistor) Fixed to "L" in the Independent I/O mode. In Primary or Secondary mode, "L" is outputted if data bus allows 16-bit access. With memory card interface, this terminal indicates the media write protect state for WP, i.e. "H" for write protect state or "L" for non- write protect state. Input values from FPSD terminal (i.e. SmartMediaTM write protect seal detect signal) and SDWP terminal (i.e. SD Memory Card write protect switch detect signal) are OR'ed and directly outputted from this terminal (This terminal is, if in the memory card interface, is set to H if FPSD="1", MMWP="1" or MROM is inserted) Two types of output format are allowed for interrupt request in the I/O card interface. It can be changed by FCR Configuration Option register: LevIREQ"D6" bit. With this bit set to "1", the terminal is in the pulse mode ("L" pulse width of about 800ns) if it is in the level mode and set to "0". Initial value immediately after reset is set to the value in the level mode. Output timing of the terminal is when ATA Status register: BSY"D7" bit changes "H"->"L". The terminal provides RDY/BSY function in the memory card interface. Or, if ATA Status register: BSY"D7"! bit is set to "1", or FCR Card Configuration and Status register:PWRDWN bit are in the setting mode, "L" is outputted.
#IOWR
61
I
I/O WRITE
#IOIS16 (WP)
45
O
I/O IS 16 bits PORT (WRITE PROTECT)
# IREQ (READY)
94
O
INTERRUPT REQUEST (READY)
#INPACK
52
O
INPUT PORT Only if #CE1, #CE2 and #IORD are set to "0" and the address on ACKNOWLEDG address bus matches with that in I/O space, the terminal outputs "L". In E the memory card interface, the terminal outputs "Hi-Z".
TOTAL 125
PAGE NO. 12
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6-3. SD memory card/ MultiMediaCard/ SmartMediaTM/ NOR flash memory interface 1
Pin name FD7 - FD4 Pin number 112-109 I/O B Pin function MEDIA DATA BUS Functional description The terminal is prepared to connect with media data bus. If clock is stabled after resetting and NOR flash memory is re-written, it takes the upper position of NOR flash memory data bus. In other modes, it takes the upper position of address/data common bus to SmartMediaTM. Address and data (including command) are discriminated by FALE and FCLE. The terminal is set to Hi-Z when #CD="H"(media non-inserted). The terminal is prepared to connect with media data bus. If clock is stabled after resetting and NOR flash memory is re-written, it takes the lower position of NOR flash memory data bus. In other modes, it takes the lower position of address/data common bus to SmartMediaTM. Address and data (including command) are discriminated by FALE and FCLE. When SD Memory Card is used, it is used as 4 bit data bus. If MultiMediaCard is used and SD Memory Card is in the 1 bit mode, FD0 only is used. It is set to Hi-Z when #CD= "H"(media non-inserted).
FD3 - FD0
127-124
B
MEDIA DATA BUS
#FCE
106
O O
SmartMediaTM The terminal indicates the chip enable output signal of SmartMediaTM. If CHIP ENABLE #CD="H"(media not-inserted), it indicates Hi-Z. SmartMediaTM COMMAND LATCH ENABLE/SD Memory Card & MultiMediaCar d CLOCK SmartMediaTM ADDRESS LATCH ENABLE SmartMediaTM READ ENABLE SmartMediaTM WRITE ENABLE/SD Memory Card & MultiMediaCar d COMMAND SmartMediaTM BUSY SmartMediaTM WRITE PROTECT The terminal indicates, if SmartMediaTM is used, the command latch enable output signal to SmartMediaTM. If command is outputted to FD bus, it outputs "H". If SD Memory Card and MultiMediaCard are used, it indicates 250KHz, 2MHz, 8MHz and16MHz clock output signal to SD Memory Card and MultiMediaCard. Clock output frequency is determined by the maximum operation frequency of media. It is set to "L" when #CD="H"(media not-inserted). Indicates address latch enable output signal to SmartMediaTM. Outputs "H" if address is outputted to FD bus. The terminal is set to "L" if #CD="H"(media not-inserted). Indicates read enable output signal to SmartMediaTM. Outputs "L" if address is outputted to FD bus. The terminal is set to "Hi-Z" if #CD="H"(media not-inserted). Indicates the write enable output signal to SmartMediaTM if used. Outputs "L" if written to FD bus. If SD Memory Card and MultiMediaCard are used, it becomes command/response input/output signal from/to SD Memory Card and MultiMediaCard. The terminal is set to Hi-Z when #CD="H" (media not inserted).
FCLE/MMC 103 LK
FALE
104
O
#FRE
107
O
#FWE/MM CMD
116
B
#FBSY
105
I
Indicates ready/busy input signal from SmartMediaTM. Indicates the busy if "0" is inputted, or the ready if "1" is inputted. Connects with the terminal via pull-up resistor from SmartMediaTM ready/busy output. Indicates write protect output signal to SmartMediaTM. Write protection is enabled except for the time when SmartMediaTM is accessed. The terminal is set to "L" if #CD= "H"(media not inserted).
#FWP
117
O
TOTAL 125
PAGE NO. 13
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6-4. SD memory card/ MultiMediaCard/ SmartMediaTM/ NOR flash memory interface 2
Pin name Pin number FPSD 25 I/O I Pin function SmartMediaTM WRITE PROTECT LABEL DETECT Functional description Indicates the write protect input signal from SmartMediaTM write protect seal. If "1" is inputted to the terminal, write related commands from host are aborted. The terminal input state is reflected to Pin Replacement Register: RWProt "D0" bit and ATA Error Register: WP"D6" bit on the to WP terminal and FCR, then the terminal input logic is directly outputted. The terminal will not change after the power is turned on, and must not be changed. Indicates the write protect input signal from SD Memory Card write protect switch. If "1" is inputted to the terminal, write related commands from host are aborted. The terminal input state is reflected to Pin Replacement Register: RWProt "D0" bit and ATA Error Register: WP"D6" bit on the to WP terminal and FCR, then the terminal input logic is directly outputted. The terminal will not change after the power is turned on, and must not be changed. Prepared to select the media type connected with TC6374AF. If the terminal input is set to "0", it is recognized as SmartMediaTM, or if set to "1", it is recognized as SD Memory Card or MultiMediaCard. Prepared to detect that TC6374AF is connected with media. If the terminal input is set to "0", it is recognized as media being connected, carrying out the normal operation. If the terminal input is set to "1", it is recognized that no media is connected, then TC6374AF enters the internal reset state and all removable media interface terminals turns to Hi-Z except for FCLE, FALE, and #FWP. In such event, OCTL="L", oscillation stops and ATA Status Register: BSY"D7" bit turns to "H". If the terminal state changes "1"->"0", the internal reset state is cleared, and the media is initialized 200ms after(with which contact between connector and media becomes stable). When SD Memory Card is used, the terminal is set to "0". If media insertion is detected, CMD0 is issued two times to initialize the media. Chip enable output signal used for the NOR flash memory in controller firmware. Write enable output signal used for the NOR flash memory in controller firmware. Output enable output signal used for the NOR flash memory in controller firmware. Busy signal used for the NOR flash memory in controller firmware. Chip enable output signal used for the NOR flash memory in controller firmware. Prepared to select the NOR flash memory type in controller firmware. If the input is set to "0", unit-1 3.3V NOR flash memory of Fujitsu (AMD) may be used. If the input is set to "1", unit-1 3.3V NOR flash memory of Sharp (Intel) may be used. Prepared to control #RP terminal of flash memory if NOR flash of Sharp is used.
SDWP
30
I
SD Memory Card WRITE PROTECT DETECT
#FCD
34
I
SELECT MEDIA TYPE MEDIA DETECT
#CD
40
I
#NOR_CE 2 #NOR_W E #NOR_O E 4 3
O O O I O
NOR CHIP ENABLE NOR WRITE ENABLE NOR OUTPUT ENABLE NOR BUSY NOR ADDRESS BUD SELECT NOR TYPE
#NOR_BS 8 Y NOR_A13 29,28,24,23 -0 ,21-18,14,1 3,11,10,6,5 SH/#FJ 15
I
#NOR_RP 9
O
NOR RESET/DEEP POWER-DOWN
TOTAL 125
PAGE NO. 14
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6-5. Others
Pin number 92 terminal function POWER ON RESET
Pin name #PONRST
I/O I
functional description A terminal for performing the power-on reset to TC6374AF. Set to "0" to move TC6374AF internally to the reset state, or if set to "1", the reset is cleared. When SD Memory Card is used, #CD is set to "0"(media insertion state). If the terminal is cleared from "0" to "1", CMD0 is issued two times for media reset. Mask clock input to TC6374AF. Provides a terminal for duty ratio 45 - 55% 16 MHz oscillation module connection. Connect the terminal to the ground if an oscillator is connected with. Mask clock input to TC6374AF. Provides a terminal for duty ratio 45 - 55% 16 MHz oscillation module connection. Keep the terminal open if an oscillator is connected with. Connect directly to RMCLK if oscillation module is used. If the oscillator is used, keep the terminal open. A terminal to select busy time after ATA command is accepted. If set to "0", minimum busy time is about 150us immediately after ATA command is accepted. If set to "1", no busy time limit is imposed immediately after ATA command is accepted. Set ting to "0" as a default is recommended.
XI
98
I
CLOCK INPUT CLOCK INPUT OSCILLATO R OUTPUT TO RMCLK SELECT BUSY
XO
99
O
OSCOUT
101
O
SELBSY
90
I
RMCLK
119
I
DEFERENCE Mask clock input to TC6374AF. Provides a terminal for duty ratio 45 - 55% 16 MHz oscillator connection. Directly connect with OSCOUT if an oscillation MASTER module is used. CLOCK INPUT CLOCK OUT MASTER CLOCK INPUT TO OUTCLK CLOCK CONTROL Clock output after the oscillation becomes stable. Directly connect with MCLK. Master clock input to TC6374AF internal logic. Directly connect with OUTCLK.
OUTCLK MCLK
121 122
O I
OCTL
120
O
Oscillator control signal. During the power-down and in the media not-connected state (#CD="1"), "L" is outputted and oscillation stop is requested. If the oscillator with oscillation control function is used, connect with the oscillator's oscillation control terminal. If oscillation module is used, keep the terminal open.
TOTAL 125
PAGE NO. 15
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6-6. Oscillation Circuit
The case which connected Oscillation Module TE4500 TC6374AF XTI
Oscillation Control Circuit
The case which connected Oscillator TE4500 TC6374AF XTI XTO OSCOUT NC NC
XTO NC ( OSCOUT RMCLK
OCTL
Oscillator Control
(Power down: "L")
"L")
Oscillation Control Circuit
RMCLK
Oscillation Stability Counter
Oscillation Stability Counter
OUTCLK MCLK
Master Clock
OUTCLK MCLK
Master Clock
OCTL
Oscillator Control
((Power down: "L") "L")
TOTAL 125
PAGE NO. 16
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
6-7. Notes on 3in1 PC Card ATA adapter
Note: For the system design, refer to the attached document: "TC6374AF reference design description (reference circuit diagram and information sheet)". This document is updated as necessary, check the latest version by inquiry. #1. RESET signal: For the compatibility with PC card interface, add a capacitor between a terminal and GND.
Put pull-up resistorsto the terminal. (see reference circuit diagram)
#2.
CE1 signal: If, due to the crosstalk by simultaneous data bus switching by target system, add a
capacitor between a terminal and GND. (see reference circuit design)
#3. #CE2 signal: If, due to the crosstalk by simultaneous data bus switching by target system, add a
capacitor between a terminal and GND. (see reference circuit design)
#4. FPSD signal: Connect the terminal with the SmartMediaTM write protect output using a resistor of about
100k pull-down.
#5. #PONRST signal: Apply a voltage detector of 2.9V in front stage of the terminal.
TOTAL 125
PAGE NO. 17
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7. Operational descryption
7-1. Outline of Interface
TC6374AF has four types of interfaces listed below. - Host interface - SD Memory Card / MultiMediaCard interface - SmartMediaTM interface - NOR flash memory interface For examples of system configuration and interface, refer to 7-2 and 7-3 respectively.
7-2. Example of system configuration
[3in1 PC Card ATA Adaptor]
VCC 3.3/5V
DC/DC Convertor 3.3/5V->3.3V
3.3V
P Type FET
3.3V
VCC
2.9V Voltage Detector with Delay Circuit
VDD #PONRST
VDD3.3 3in1 ATA Connector Media Interface
#CD GND Switch
Note: The diagram above is a simplified one. For the detailed information, refer to the attached document: "TC6374AF reference design description (reference circuit diagram and information sheet)". As the information is updated as necessary, keep the latest one by inquiry.
PC Card Connector
TC6374AF TE4500 PC Card ATA Interface #CD
3.3V NOR Flash
Ceramic Resonator
TOTAL 125
PAGE NO. 18
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-3. Host interface
TC6374AF supports as a host interface the PC Card (Memory, ATA) interface. In PC Card ATA interface, it supports 4 types of I/O mode(Memory Mapped I/O, Independent I/O, Primary and Secondary). Furthermore, PC Card interface has a memory space called attribute memory allowing the software to configure TC6374AF("*" indicated in the table shown later means "Don't Care".).
7-4. PC Card interface
7-4-1. Attribute Memory space Attribute memory consists of CIS(Card Information Structure) with which a host recognizes the function type connected with TC6374AF and FCR (Function Configuration Register) for configuration. Attribute memory can be accessed of course in the memory interface state, and additionally, even after set to the I/O interface. Access methods and addresses of register in the attribute memory are listed below.
7-4-1-1. Attribute Memory read operation
During the Attribute Memory Read Cycle, set #WE to inactive "1", and #REG and #OE to active "0". #CE2, #CE1 and A0 are controlled at odd/even addresses, though Attribute Memory access is enabled only at even address data.
Function Mode Standby Mode Byte Access (8 Bits) Word Access (16 Bits) Odd Byte Only Access #REG * 0 0 0 0 #CE2 1 1 1 0 0 #CE1 1 0 0 0 1 A0 * 0 1 * * #OE * 0 0 0 0 #WE * 1 1 1 1 D15 - D8 Hi-Z Hi-Z Hi-Z Invalid Invalid D7 - D0 Hi-Z Even byte Invalid Even byte Hi-Z
7-4-1-2. Attribute Memory write operation
During Attribute Memory Write Cycle, set #OE to inactive "1", and #REG and #WE to active "0".
Function Mode Standby Mode Byte Access (8 Bits) Word Access (16 Bits) Odd Byte Only Access #REG * 0 0 0 0 #CE2 1 1 1 0 0 #CE1 1 0 0 0 1 A0 * 0 1 * * #OE * 1 1 1 1 #WE * 0 0 0 0 D15 - D8 * * * * * D7 - D0 * Even byte * Even byte *
TOTAL 125
PAGE NO. 19
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-1-3. Attribute Memory address
Address * * * * * 200h #CE 1 0 0 0 0 0 0 202h 0 0 204h 0 0 206h 0 0 208h 0 0 20Ah 0 0 20Ch 0 0 20Eh 0 0 210h 0 0 212h 0 0 214h 0 0 #REG * 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 #WE * 1 0 1 * 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 #OE * 0 1 0 * 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Power Management Register R/W I/O Limit R/W I/O Base 3 R/W I/O Base 2 R/W I/O Base 1 R/W I/O Base 0 R/W Extended Status Register R/W Socket and Copy Register R/W Pin Replacement Register R Card Configuration and Status Register R/W Standby Common Memory Read Common Memory Write Card Information Structure Read Invalid Access Configuration Option Register FCR Read/Write Invalid R W R Invalid R/W
TOTAL 125
PAGE NO. 20
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-2. Common Memory space
7-4-2-1. Common Memory read operation
During Common Memory Read Cycle, set #REG and #WE to inactive "1", and #OE to active "0".
Function Mode Standby Mode Byte Access (8 Bits) Word Access (16 Bits) Odd Byte Only Access #REG * 1 1 1 1 #CE2 1 1 1 0 0 #CE1 1 0 0 0 1 A0 * 0 1 * * #OE * 0 0 0 0 #WE * 1 1 1 1 D15 - D8 Hi-Z Hi-Z Hi-Z Odd byte Odd byte D7 - D0 Hi-Z Even byte Odd byte Even byte Hi-Z
7-4-2-2. Common Memory write operation
During Common Memory Write Cycle, set #REG and #OE to inactive "1", and #WE to active "0".
Function Mode Standby Mode Byte Access (8 Bits) Word Access (16 Bits) Odd Byte Only Access #REG * 1 1 1 1 #CE2 1 1 1 0 0 #CE1 1 0 0 0 1 A0 * 0 1 * * #OE * 1 1 1 1 #WE * 0 0 0 0 D15 - D8 * * * Odd byte Odd byte D7 - D0 * Even byte Odd byte Even byte *
TOTAL 125
PAGE NO. 21
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-3. I/O space
7-4-3-1. Read operation in I/O Addressing mode
Function Mode Standby Mode Byte Access (8 Bits) Word Access (16 Bits) I/O Inhibit Odd Byte Only Access #REG * 0 0 0 1 0 #CE2 1 1 1 0 * 0 #CE1 1 0 0 0 * 1 A0 * 0 1 * * * #IORD * 0 0 0 0 0 #IOWR * 1 1 1 1 1 D15 - D8 Hi-Z Hi-Z Hi-Z Odd byte Hi-Z Odd byte D7 - D0 Hi-Z Even byte Odd byte Even byte Hi-Z Hi-Z
7-4-3-2. Write operation in I/O Addressing mode
Function Mode Standby Mode Byte Access (8 Bits) Word Access (16 Bits) I/O Inhibit Odd Byte Only Access #REG * 0 0 0 1 0 #CE2 1 1 1 0 * 0 #CE1 1 0 0 0 * 1 A0 * 0 1 * * * #IORD * 1 1 1 1 1 #IOWR * 0 0 0 0 0 D15 - D8 * * * Odd byte * Odd byte D7 - D0 * Even byte Odd byte Even byte * *
TOTAL 125
PAGE NO. 22
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-4. Access method in ATA register
TC6374AF supports four types of I/O addressing modes for PC Card ATA in the host interface. I/O Addressing mode is determined by the configuration in the FCR Configuration Option Register: D5 - D0 bit, "Function Configuration Index". Access method and addresses in each register are listed below for each I/O Addressing mode.
7-4-4-1. Memory Mapped mode
Each register address is shown in the Memory Mapped mode.
7-4-4-1-1. Lower byte access
#CE2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 #CE1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 #REG 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Offset 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Dh Eh Fh A10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 A9-A4 * * * * * * * * * * * * * * * A3 0 0 0 0 0 0 0 0 1 1 1 1 1 * * A2 0 0 0 0 1 1 1 1 0 0 1 1 1 * * A1 0 0 1 1 0 0 1 1 0 0 0 1 1 * * A0 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 Hi-Z D15-D8 #OE = "0" Read Data Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status Duplicate Read Data Duplicate Odd Read Data Duplicate Error Alternate Status Device Address Read Data Odd Read Data D7-D0 #WE = "0" Write Data Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command Duplicate Write Data Duplicate Odd Write Data Duplicate Features Device Control Reserved Write Data Odd Write Data
7-4-4-1-2. Upper byte access
#CE2 0 0 0 0 0 0 0 0 #CE1 1 1 1 1 1 1 1 1 #REG 1 1 1 1 1 1 1 1 Offset 0h,1h 2h,3h 4h,5h 6h,7h 8h,9h Ch,Dh Eh,Fh A10 0 0 0 0 0 0 0 1 A9-A4 * * * * * * * * A3 0 0 0 0 1 1 1 * A2 0 0 1 1 0 1 1 * A1 0 1 0 1 0 0 1 * A0 #OE = "0" * * * * * * * * Error Sector Number Cylinder High Status Duplicate Odd Read Data Duplicate Error Device Address Odd Read Data D15-8 #WE = "0" Features Sector Number Cylinder High Command Duplicate Odd Write Data Duplicate Features Reserved Odd Write Data Hi-Z D7-D0
TOTAL 125
PAGE NO. 23
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-4-1-3. Word access
#OE = "0" #CE2 #CE1 #REG Offset A10 A9-A4 A3 A2 A1 A0 Upper Byte"D15-D8" Lower Byte"D7-D0" 0 0 1 0h,1h 0 * 0 0 0 * Odd Read Data Even Read Data Sector Number Sector Count Cylinder High Cylinder Low Status Device / Head Duplicate Odd Read Data Duplicate Even Read Data Duplicate Error * Device Address Alternate Status Odd Read Data Even Read Data #WE = "0" Upper Byte"D15-D8" Lower Byte"D7-D0" Odd Write Data Even Write Data Sector Number Sector Count Cylinder High Cylinder Low Command Device / Head Duplicate Odd Write Data Duplicate Even Write Data Duplicate Features Reserved Device Control Odd Write Data Even Write Data
0
0
1
2h,3h
0
*
0
0
1
*
0
0
1
4h,5h
0
*
0
1
0
*
0
0
1
6h,7h
0
*
0
1
1
*
0
0
1
8h,9h
0
*
1
0
0
*
0
0
1
Ch,Dh
0
*
1
1
0
*
0
0
1
Eh,Fh
0
*
1
1
1
*
0
0
1
-
1
*
*
*
*
*
TOTAL 125
PAGE NO. 24
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-4-2. Independent I/O mode
Each register address is shown in the Independent I/O mode.
7-4-4-2-1. Lower byte access
#CE2 1 1 1 1 1 1 1 1 1 1 1 1 1 #CE1 0 0 0 0 0 0 0 0 0 0 0 0 0 #REG 0 0 0 0 0 0 0 0 0 0 0 0 0 Offset 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h Ch, Dh Eh Fh A10-A4 * * * * * * * * * * * * * A3 0 0 0 0 0 0 0 0 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 0 0 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 * 0 1 Hi-Z D15-D8 #IORD = "0" Read Data Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status Duplicate Even Read Data Duplicate Odd Read Data Duplicate Error Alternate Status Device Address D7-D0 #IOWR = "0" Write Data Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command Duplicate Even Write Data Duplicate Odd Write Data Duplicate Features Device Control Reserved
7-4-4-2-2. Upper byte access
#CE2 0 0 0 0 0 0 0 #CE1 1 1 1 1 1 1 1 #REG 0 0 0 0 0 0 0 Offset 0h,1h 2h,3h 4h,5h 6h,7h 8h,9h Ch,Dh Eh,Fh A10-A4 * * * * * * * A3 0 0 0 0 1 1 1 A2 0 0 1 1 0 1 1 A1 0 1 0 1 0 0 1 A0 #IORD = "0" * * * * * * * Error Sector Number Cylinder High Status Duplicate Odd Read Data Duplicate Error Device Address D15-8 #IOWR = "0" Features Sector Number Cylinder High Command Duplicate Odd Write Data Duplicate Features Reserved Hi-z D7-D0
TOTAL 125
PAGE NO. 25
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-4-2-3. Word access
#IORD = "0" #CE2 #CE1 #REG Offset A10-A4 A3 A2 A1 A0 Upper Byte "D15-D8" Lower Byte "D7-D0" 0 0 0 0h,1h * 0 0 0 * Odd Read Data Even Read Data Sector Number Sector Count Cylinder High Cylinder Low Status Device/Head Duplicate Odd Read Data Duplicate Even Read Data Duplicate Error Hi-z Device Address Alternate Status #IOWR = "0" Upper Byte "D15-D8" Lower Byte "D7-D0" Odd Write Data Even Write Data Sector Number Sector Count Cylinder High Cylinder Low Command Device/Head Duplicate Odd Write Data Duplicate Even Write Data Duplicate Features * Reserved Device Control
0
0
0
2h,3h
*
0
0
1
*
0
0
0
4h,5h
*
0
1
0
*
0
0
0
6h,7h
*
0
1
1
*
0
0
0
8h,9h
*
1
0
0
*
0
0
0
Ch,Dh
*
1
1
0
*
0
0
0
Eh,Fh
*
1
1
1
*
TOTAL 125
PAGE NO. 26
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-4-3. Primary and Secondary I/O mode
Each register address is shown in the Primary, Secondary I/O mode.
7-4-4-3-1. Lower byte access
#CE2 1 1 1 1 1 1 1 1 1 1 #CE1 0 0 0 0 0 0 0 0 0 0 #REG 0 0 0 0 0 0 0 0 0 0 A10 Primary * * * * * * * * * * 3Fh 37h 1Fh 17h A9-A4 Secondary 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 1 1 0 0 1 1 1 1 0 1 0 1 0 1 0 1 0 1 Hi-z A3 A2 A1 A0 D15D8 D7-D0 #IORD = "0" Read Data Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status Alternate Status Device Address #IOWR = "0" Write Data Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command Device Control Reserved
7-4-4-3-2. Upper byte access
#CE2 0 0 0 0 0 #CE1 1 1 1 1 1 #REG 0 0 0 0 0 A10 Primary * * * * * 3Fh 37h 1Fh 17h A9-A4 Secondary 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 * * * * * A3 A2 A1 A0 Error Sector Number Cylinder High Status Device Address D15-D8 #IORD = "0" #IOWR = "0" Features Sector Number Cylinder High Command Reserved Hi-z D7-D0
TOTAL 125
PAGE NO. 27
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-4-4-3-3. Word access
A9-A4 #CE2 #CE1 #REG A10 Primary Secondary A3 A2 A1 A0 #IORD = "0" Upper Byte "D15-D8" Lower Byte "D7-D0" 0 0 0 * Odd Read Data Even Read Data Sector Number Sector Count Cylinder High Cylinder Low Status Device/Head Device Address Alternate Status #IOWR = "0" Upper Byte "D15-D8" Lower Byte "D7-D0" Odd Write Data Even Write Data Sector Number Sector Count Cylinder High Cylinder Low Command Device/Head Reserved Device Control
0
0
0
*
0
0
0
* 1Fh 17h
0
0
1
*
0
0
0
*
0
1
0
*
0
0
0
*
0
1
1
*
0
0
0
*
3Fh
37h
0
1
1
*
TOTAL 125
PAGE NO. 28
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5. Register description
Registers for attribute memory space and I/O space are described below.
7-5-1. CIS (Card Information Structure) CIS is a read-only register used to indicate the attribute information about functions connected with TC6374AF. Its address is an even number in 000h - 1FFh for 256 bytes, and implemented with TC6374AF built-in RAM. At resetting, it is set by reading data from the firmware NOR flash memory, where TC6374AF sets RDY/BSY to "L", notifying the host interface of access-disabled. Default CIS is described below.
Note : CARD INFORMATION STRUCTURE is stored in TC6374AF firmware for NOR flash memory. Data shown below is a reference data (DEFAULT CARD INFORMATION STRUCTURE), and may be changed if so requested. Data modification is to be submitted within 256 byte. DEFAULT CARD INFORMATION STRUCTURE will not assure operations.
TOTAL 125
PAGE NO. 29
TC6374AF Hardware Datasheet
DEFAULT CARD INFORMATION STRUCTURE
Address
Rev. 1.22
02/2/15
000 002 004 006 008 00A 00C 00E 010 012 014 016 018 01A 01C 01E 020 022 024 026 028 02A 02C 02E 030 032 034 036 038 03A 03C 03E 040 042 044 046 048 04A 04C 04E 050 052 054 056 058 05A 05C 05E 060 062 064 066 068 06A 06C 06E 070 072 074 076 078 07A 07C 07E 100 102 104 106 108 10A 10c 10E 110 112 114 116 118 11A 11c 11E 11E
Data 01 03 D9 01 FF 18 02 DF 01 20 04 00 00 00 00 21 02 04 01 22 02 01 01 22 03 02 04 07 1C 04 03 D9 01 FF 1A 05 01 03 00 02 0F 1B 0A C0 C0 A1 07 55 4D 5D 08 00 20 1B 05 00 01 01 B5 1E 1B 0C C1 41 03 01 01 B5 1E 15 14 05 00 20 20 20 20 20 20 20 20
Contens Tuple ID (Device Information Tuple) Pointer for Next Tuple Classification: I/O, Speed: 250ns Device Size 2Kbyte End of Device Infromation Tuple Tuple ID (JEDEC Device Information) Pointer for Next Tuple JEDEC Maker ID JEDEC DeviceID (No VPP) Tuple ID (Manufacture Information) Pointer for Next Tuple Manufacture Code " Manufacture Information " Tuple ID (Functional Information) Pointer for Next Tuple Card Function Code System Initialization Information Tuple ID (Functional Extension) Pointer for Next Tuple Disk-Functional Interface Tuple(TYPE1) PC Card ATA Specification Tuple ID(Functional Extension) Pointer for Next Tuple PC Card ATA Extension Tuple (TYPE2) ATA Functional byte1 ATA Functional byte2 Tuple ID (Additional Device Information Tuple) Pointer for Next Tuple 3.3V Operation, WAIT Support Classification: I/O, Speed: 250ns Device Size 2Kbyte End of Device Information Tuple Tuple ID (Configuration Tuple) Pointer for Next Tuple Field Size byte Last Entry of Configuration Table CCR Base Address (L) 0200h CCR Base Address (H) 0200h CCR Existence Mask 0h Tuple ID (Configuration Entry) [Memory Mapped] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Functional Selection byte Power: Parameter Selectioin byte (Vcc) Power: Normal Voltage (5V) Power: Min Voltage (4.5V) Power: Max Voltage (5.5V) Memory address Book (LSB) Memory address Book (MSB) Other Information (With CCSR Power-Down) Tuple ID (Configuration Entry) [Memory Mapped] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Functional Selection byte Power: Normal Voltage (3.3V) " [Extension byte] Tuple ID (Configuration Entry) [Independent I/O] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Configuration Table Index byte Interface Description Field Functional Selection byte Power: Normal Voltage (3.3V) " [Extension byte] Tuple ID (Product Informatioin Tuple) Pointer for Next Taple Specification Version High[Ver.5] Specification Version Low[ .0] Product Maker Information " " " " " "
Address 080 082 084 086 088 08A 08C 08E 090 092 094 096 098 09A 09C 09E 0A0 0A2 0A4 0A6 0A8 0AA 0AC 0AE 0B0 0B2 0B4 0B6 0B8 0BA 0BC 0BE 0C0 0C2 0C4 0C6 0C8 0CA 0CC 0CE 0D0 0D2 0D4 0D6 0D8 0DA 0DC 0DE 0E0 0E2 0E4 0E6 0E8 0EA 0EC 0EE 0F0 0F2 0F4 0F6 0F8 0FA 0FC 0FE 120 122 124 126 128 12A 12c 12E 130 132 134 136 138 13A 13c 13E 13E
Data 99 07 55 4D 5D 64 F0 FF FF 20 1B 05 01 01 01 B5 1E 1B 11 C2 41 99 07 55 4D 5D EA 61 F0 01 07 F6 03 01 EE 20 1B 05 02 01 01 B5 1E 1B 11 C3 41 99 07 55 4D 5D EA 61 70 01 07 76 03 01 EE 20 1B 05 00 20 20 20 20 00 30 2E 30 00 FF 14 00 FF 00 00 00
Contens Functional Selection byte Power: Parameter Selection byte (Vcc) Power: Normal Voltage (5V) Power: Min Voltage (4.5V) Power: Max Voltage (5.5V) I/O Space Description byte Interrupt Request: Interrupt Request Information Interrupt Request: IRQ07 Mask Interrupt Request: IRQ815 Mask Other Information (With CCSR Power-Down) Tuple ID (Configuration Entry) [Independent I/O] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Functional Selection byte Power: Normal Voltage (3.3V) " [Extension byte] Tuple ID (Configuration Entry) [Primary I/O] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Functional Selection byte Power: Parameter Selection byte (Vcc) Power: Normal Voltage (5V) Power: Min Voltage (4.5V) Power: Max Voltage (5.5V) I/O Space Description byte I/O Area Description byte I/O Address Area 01F001F7h (8byte) I/O Address Area 03F603F7h (2byte) Interrupt Request Information (/IRQ14) Othre Information (With CCSR Power-Down) Tuple ID (Configuration Entry) [Primary I/O] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Functional Selection byte Power: Normal Voltage (3.3V) " [Extension byte] Tuple ID [Secondary I/O] Pointer for Next Tuple Configuration Table Index byte Interface Description Field Functional Selection byte Power: Parameter Selection byte (Vcc) Power: Normal Voltage (5V) Power: Min Voltage (4.5V) Power: Max Voltage (5.5V) I/O Space Description byte I/O Area Description byte I/O Address Area 01700177h (8byte) I/O Address Area 03760377h (2byte) Interrupt Request Information (/IRQ14) Other Information (With CCSR Power-Down) Tuple ID [Secondary I/O] Pointer for Next Tuple End of Product Maker Information Product Name Information " " " End of Product Name Product Version Informagion "0" " "." " "0" End of Product Version Information End of Product Information Tuple No-Link Tuple ID Pointer for Next Tuple End of Progression Tuple Null-tuple Null-tuple Null-tuple
TOTAL 125
PAGE NO. 30
TC6374AF Hardware Datasheet
7-5-2. FCRs (Function Configuration Registers) The host to set TC6374AF uses these registers.
Rev. 1.22
02/2/15
7-5-2-1. Configuration Option Register
Address 200h Initial Value Read/Write D7 SRESET 0 D6 LevIREQ 1 D5 D4 D3 D2 D1 D0
Function Configuration Index Conf5 0 Conf4 0 R/W Conf3 0 Conf2 0 Conf1 0 Conf0 0
SRESET:
Used for PC Card Software Reset. Except that this bit is not reset, the same operation as in Power On Reset and Hardware Reset is applicable. If, when SD Memory Card is used, this bit is cleared from "1" to "0", CMD0 is issued two times to initialize the media. "1": reset state
LevIREQ:
"0": reset cleared
A signal used to select the mod of interrupt signal to #IREQ terminal. "1": level mode (default) "0": pulse mode
Function Configuration Index: Used as an I/O mode select signal.
Conf5 0 0 0 0 Conf4 0 0 0 0 Conf3 0 0 0 0 Conf2 0 0 0 0 Conf1 0 0 1 1 Conf0 0 1 0 1 Mode Memory Mapped I/O Independent I/O Primary I/O 1F0~1F7/3F0~3F7 Secondary I/O 170~177/370~377
TOTAL 125
PAGE NO. 31
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-2-2. Card Configuration and Status Register
Address 202h Initial Value Read/Write D7 Changed 0 0 Fixed D6 SigChg 0 D5 IOIs8 0 R/W D4 RFU 0 0 Fixed D3 Audio 0 D2 PwrDwn 0 R/W D1 Intr 0 R D0 IntrAck 0 0 Fixed
Changed:
Fixed to "0" since TC6374AF has no changes as specified in PC Card standard as shown below. If Pin Replacement Register: D7-D4 bit is changed to "1", the above bit is set to 0 in TC6374AF. If Extended Status Register bit is changed to"1", for the purpose of modem card function, no changes occur in 3in1 PC Card ATA that uses TC6374AF.
SigChg:
Fixed to 0 in TC6374AF as no changes occur, which is to be treated in "Changed".
IOIs8:
Indicates the data bus width on host interface. "1" : 8 bit width "0" : 16 bit width (default) This bit may be changed by executing ATA's Set Feature command. Or, this bit is independent of #IOIS16 terminal operation.
PwrDwn:
Indicates the Power-down mode. "1": Power-down "0": Operation state If the bit is set to "0", the state stays in the ATA command state. If set to "1", it is compatible with ATA stand-by mode. Even if, in the power-down mode clearing (transition), ATA command is disabled to accept, ATA Status Register:D6 bit "DRDY" will not move to "L" (Not Ready). The host may enter the power-down state in the TC6374AF BSY mode. With the bit set to "1", the oscillation stops.
Intr:
Operates with #IREQ terminal in parallel, though, if in the pulse mode, the bit operates as in the level mode. "H" : #IREQ = " L"
IntrAck:
"L" : #IREQ = "H"
Intr bit read/write enable bit, fixed to "0". "0" : Intr = read-only "1" : Intr = read/write enabled
TOTAL 125
PAGE NO. 32
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-2-3. Pin Replacement Register
Address 204h Initial Value Read/Write D7 CBVD1 0 D6 CBVD2 0 0 Fixed D5 CREDY 0 D4 CWProt 0 D3 RBVD1 1 D2 RBVD2 1 1 Fixed D1 RREDY 1 D0 RWProt R
D7 - D4:
Fixed to 0 since, in TC6374AF, no relevant changes occur in the PC Card standard under operation.
RWProt:
Outputs the input logic value of FPSD or SDWP terminal. The terminal will not change after the media insertion. No change allowed. This bit goes to "1" when
-
Using MROM or Read-only card "Permanent write protection" and "Temporary write protection" of the CSD is activated while Using SD memory card / MultiMediaCard "1" : Write protect
"0" : Non-write protect
7-5-2-4. Socket and Copy Register
Address 206h Initial Value Read/Write D7 RFU 0 0 D6 D5 Copy Number 0 0 R/W 0 D4 D3 D2 D1 D0
Socket Number 0 0 0
Copy Number:
Indicates the device number. If a card with same function is inserted to the host, the position of the card is written from the host. This value is compared with ATA Device/Head Register:D4 bit "DEV". If not matched, TC6374AF will not respond with the access from host. device 0: 000B=(D6,D5,D4)B device 1: 001B=(D6,D5,D4)B
Socket Number:
Indicates the order of socket inserted, which is written by host. It does not affect
TC6374AF's operation.
TOTAL 125
PAGE NO. 33
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-2-5. Extended Status Register
Address 208h Initial Value Read/Write D7 Event 3 0 D6 Event 2 0 D5 Event 1 0 D4 ReqAttn 0 R/W D3 Enable 3 0 D2 Enable 2 0 D1 Enable 1 0 D0 ReqAttn Enable 0
This register is a read/write enabled for maintaining the compatibility, not affecting the TC6374AF's
operation.
7-5-2-6. I/O Base 0 Register
Address 20Ah Initial Value Read/Write 0 0 0 0 R/W D7 D6 D5 D4 D3 D2 D1 D0
I/O Base 0 0 0 0 0
This register is a read/write enabled for maintaining the compatibility, not affecting the TC6374AF's
operation.
7-5-2-7. I/O Base 1 Register
Address 20Ch Initial Value Read/Write 0 0 0 0 R/W D7 D6 D5 D4 D3 D2 D1 D0
I/O Base 1 0 0 0 0
This register is a read/write enabled for maintaining the compatibility, not affecting the TC6374AF's operation.
7-5-2-8. I/O Base 2 Register
Address 20Eh Initial Value Read/Write 0 0 0 0 R/W D7 D6 D5 D4 D3 D2 D1 D0
I/O Base 2 0 0 0 0
This register is a read/write enabled for maintaining the compatibility, not affecting the TC6374AF's
operation.
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-2-9. I/O Base 3 Register
Address 210h Initial Value Read/Write 0 0 0 0 R/W D7 D6 D5 D4 D3 D2 D1 D0
I/O Base 3 0 0 0 0
This register is a read/write enabled for maintaining the compatibility, not affecting the TC6374AF's
operation.
7-5-2-10. I/O Limit Register
Address 212h Initial Value Read/Write 0 0 0 0 R/W D7 D6 D5 D4 I/O Limit 0 0 0 0 D3 D2 D1 D0
This register is a read/write enabled for maintaining the compatibility, not affecting the TC6374AF's
operation.
7-5-2-11. Power Management Register
Address 214h Initial Value Read/Write D7 RFU (0) 0 D6 RFU (0) 0 0 Fixed D5 RFU (0) 0 D4 RFU (0) 0 D3 State Restored 0 D2 Begin/ Done State Operation 0 R/W D1 Save/ Restore State 0 D0 Stored State Exists 0 0 Fixed
This register will not affect the TC6374AF's operation.
State Restored:
If, when Save/Restore State bit is set, Begin/Done State Operation bit is additionally set, this bit is set to "1". Cleared to "0" if this register is read.
Begin/Done State Operation:
Fixed to "0" when reading. If this bit is set to "1", State Restored bit is set to "1".
Save/Restore State:
A read/write enabled register.
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3. ATA Registers
7-5-3-1. Data Register
Address D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Data Word Data byte Initial Value Read/Write Unidentified R/W
A 16-bit register, used to transfer the data block between ATA data buffer in TC6374AF and host, allowing word access or byte access. Operation depends on data bus width, i.e. 8 bits or 16 bits, where, in 8 bit width, even and odd number data are outputted alternately. For the detailed register's operation, refer to the
outline description about ATA commands as well as ATA/ATAPI-5 standard.
7-5-3-2. Error Register
Address D7 BBK Initial Value Read/Write 0 D6 UNC(WP) 0 D5 MC 0 D4 IDNF 0 R D3 MCR 0 D2 ABRT 0 D1 NM 0 D0 AMNF 1
This register includes additional information about the sources of error generated when destination code is processed. Host must check this register if ATA Status Register: D0 bit "ERR" is set to "H". After Power On Reset or ATA Execute Device Diagnostic command is executed, this register is set to the diagnosis code. BBK, TKNOF and AMNF are present not for reporting the original error in detail, but for indicating the error code of ATA Execute Device Diagnostic command (for details, refer to the table below). For the detailed
operation of bits listed below, refer to the outline description about ATA commands as well as ATA/ATAPI-5 standard. BBK (Bad Block Detected): Indicates that, in the sector's ID section, a mark of defective block is detected.
TC6374AF is fixed to "L".
UNC (Uncorrectable Data Error) or WP (Write Protected Media):
Set to "H" if an unrecoverable error occurs, or if attempted to write to the write protect media.
MC (Media Changed):
Indicates that the state changes in the remove/insert type media. Fixed to 0 in TC6374AF, since no relevant changes defined in ATA/ATAPI-5 standard occur in operation.
IDNF (ID Not Found):
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TC6374AF Hardware Datasheet
Set to "H" if no ID section is found for the sector requested.
MCR (Media Change Requested):
Rev. 1.22
02/2/15
Indicates that, in the remove/insert type media, the release latch is pressed. Fixed to L in TC6374AF, since no relevant changes defined in ATA/ATAPI-5 standard occurs in operation.
ABRT (Aborted Command): Indicates that a requested command is aborted. NM (No Media):
Set to H if no media is inserted. Fixed to L in TC6374AF, since no relevant changes defined in ATA/ATAPI-5 standard occurs in operation.
AMNF (Address Mark Not Found):
Indicates no data address mask is found after ID section is normally detected.
Diagnostic Codes (Please refer to the EXECUTE DEVICE DIAGNOSTIC command for details.)
Code 01h 02h Error Type No Error Detected Formatter Device Error
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-3. Features Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Features byte Read/Write W
This register allows ATA command to have a special purpose, and is used to enable/disable the host interface function. For the detailed operation of this register, refer to the SETFEATURES command in
the outline description of ATA command, as well as ATA/ATAPI-5 standard.
7-5-3-4. Sector Count Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Sector Count Initial Value Read/Write 0 0 0 0 R/W 0 0 0 1
A register used to write the sector count of data transfer-requested regarding ATA read/write operations between the host and TC6374AF. If this register is set to 0h (All "0"), sector count specifies 256. If, at the end of ATA command, this register is set to 0h, ATA command is normally completed. If normally completed, this register is set to the sector count, which must be transferred to complete the host request (specifying the count of remaining sectors to be transferred). Immediately after Power-on Reset, this register is set to "00h". It is set to "01h" after TC6374AF's initialization is completed. For the detailed operation of this register,
refer to the outline description of ATA command as well as ATA/ATAPI-5 standard.
7-5-3-5. Sector Number Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Sector Number (CHS Addressing) Logical Block Number bits A07~A00 (LBA Addressing) Initial Value Read/Write 0 0 0 0 R/W 0 0 0 1
This register is used to write the start sector number used by the host in the CHS mode. At the end of ATA command, the host can read from this register the last sector number. If LBA mode is selected, the host specifies Logical Block Number bits A07 - A00. At the end of ATA command, the host can read from this register the Logical Block Number. After Power-on Reset, this register is set to "00h". It is set to "01h" after TC6374AF's initialization is completed. For the detailed operation of this register, refer to the outline
description of ATA command as well as ATA/ATAPI-5 standard.
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PAGE NO. 38
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-6. Cylinder Low Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Cylinder Number Low byte (CHS Addressing) Logical Block Number bits A15~A08 (LBA Addressing) Initial Value Read/Write 0 0 0 0 R/W 0 0 0 0
This register is used to write the lower bytes of start cylinder number used by the host in the CHS mode. At the end of ATA command, the host can read from this register the lower bytes of last cylinder number. If LBA mode is selected, the host specifies Logical Block Number bits A15 - A08. After ATA command completed, the host can read from this register the Logical Block Number. For detailed operation of this register, refer
to the outline description of ATA commands as well as ATA/ATAPI-5 standard.
7-5-3-7. Cylinder High Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Cylinder Number High byte (CHS Addressing) Logical Block Number bits A23~A16 (LBA Addressing) Initial Value Read/Write 0 0 0 0 R/W 0 0 0 0
This register is used to write the upper bytes of start cylinder number used by the host in the CHS mode. After ATA command is completed, the host can read from this register the upper bytes of last cylinder number. If LBA mode is selected, the host specifies Logical Block Number bits A23 - A16. If ATA command is completed, the host can read from this register the Logical Block Number. For detailed operations of this register, refer to the outline description of ATA commands as well as ATA/ATAPI-5 standard.
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-8. Device/Head Register
Address D7 1 Initial Value Read/Write 1 D6 LBA (0) LBA (1) 0 D5 1 1 D4 DEV 0 R/W D3 HS3 LBA27 0 D2 HS2 LBA26 0 D1 HS1 LBA25 0 D0 HS0 LBA24 0
This register is used to specify a drive out of a pair of drives that shares a set of registers. For detailed
operation of each bit, refer to the outline description of ATA commands as well as ATA/ATAPI-5 standard. LBA (Logical Block Address):
This bit is used to select either CHS mode or LBA mode. "0" : CHS Addressing mode "1" : LBA Addressing mode
DEV (Device Address): This bit is used to write the drive number selected by host.
"0" : drive 0 (card 0)
"1" : drive 1 (card 1)
This bit affects ATA Device Address Register: nDS1 and nDS0.
HS3 - HS0:
Indicates, in the CHS Addressing mode, the head number: bits 3~0.
LBA27 - LBA24:
Indicates, in the LBA Addressing mode, Logical Block Number: bits 27~24.
(Reference Information) LBA <-> CHSConversion Formula
CHS -> LBAConversion Formula LBA -> CHSConversion Formula
LBA = (C x HpC + H) x SpH + S + 1 C = LBA / (HpC x SpH)
H = (LBA / SpH) mod HpC S = (LBA mod SpH) + 1 C: HpC: H: SpH: S: Cylinder number Head count per cylinder Head count Sector number per track Sector number
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-9. Alternate Status Register
Address D7 BSY Initial Value Read/Write 0 D6 DRDY 0 D5 DWF 0 D4 DSC 0 R D3 DRQ 0 D2 CORR 0 D1 IDX 0 D0 ERR 0
A register used to report, according to the read instruction by the host, TC6374AF state. Reading out this register will not clear the interrupt (#IREQ). For detailed operation of each bit, refer to the outline
description ATA commands as well as ATA/ATAPI-5 standard. BSY (Busy) : Indicates the TC6374AF busy state. Set always to H if ATA Command Registers
accessed.
DRDY (Device Ready) :
Indicates that, when the bit is set to "H", TC6374AF can responds to ATA command. If an error is present, this bit is latched and not changed until the host reads this register. If read again, this bit indicates the current TC6374AF state. At the power-on, this bit is cleared to "L", and keeps it until being ready for the reception of ATA command.
DF (Device Fault):
Indicates the current device fault state. Fixed to "L".
DSC (Device Seek Complete):
Indicates that the head is positioned on the track. TC6374AF, though, has no heads, then it is normally set to "H". Set to "L" in the initial setup mode.
DRQ (Data Request):
Indicates that data transfer is ready in a unit of word or byte between the host and TC6374AF.
CORR (Corrected Data):
Fixed to "L". In ATA/ATAPI-5 standard, this bit is defined as no longer used.
IDX (Index):
Fixed to "L". In ATA/ATAPI-5 standard, this bit is defined as no longer used.
ERR (Error):
Indicates, while the previous ATA command is executed, an error occurs. ATA Error Register specifies the information related with error cause.
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-10. Status Register
Address D7 BSY Initial Value Read/Write 0 D6 DRDY 0 D5 DWF 0 D4 DSC 0 R D3 DRQ 0 D2 CORR 0 D1 IDX 0 D0 ERR 0
A register used to report, according to the read instruction from the host, the TC6374AF state. If this register is read, the interrupt (#IREQ) is cleared. For detailed information, refer to ATA Alternate Status Register. For
detailed operation of this register, refer to the outline description of ATA command as well as ATA/ATAPI-5 standard.
7-5-3-11. Device Control Register
Address D7 Read/Write D6 D5 D4 W D3 1 D2 SRST D1 nIEN D0 0
This register is used to control TC6374AF interrupt request and instruct to TC6374AF the ATA Software Reset. For detailed operation of each bit, refer to the outline description of ATA commands as well as ATA/ATAPI-5 standard.
SRST (Software Reset):
ATA Software Reset bit. With this bit set to "1", reset state is stored. If this bit is cleared to "0", reset is cleared. If SD Memory Card is used, the bit is changed from "1" to "0", CMD0 is issued two times to initialize the media.
nIEN (Interrupt Enable):
This bit can be ignored while TC6374AF is set with Memory Mapped I/O. Whenever this bit is set to "1", TC6374AF's interrupt is prohibited.
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-12. Device Address Register
Address D7 Initial Value Read/Write D6 nWTG 1 D5 nHS3 1 D4 nHS2 1 R D3 nHS1 1 D2 nHS0 1 D1 nDS1 1 D0 nDS0 0
This register is used to keep the compatibility with ATA disk drive interface. For detailed operation of each
bit, refer to the outline description of ATA command as well as ATA/ATAPI-5 standard. nWTG (Write Gate):
Cleared to L whenever write operation is in progress, or set to H when not. If the bit is cleared to "L", the host must not change the voltage applied to TC6374AF.
nHS3~nHS0:
A head select bit, which is an inverted signal of ATA Device/Head Register: D3 - D0 bits "HS3 - HS0".
nDS1:
Drive "1" select bit. Set to 0 if Device/Head Register: DEV bit is set to "1".
nDS0:
Drive "0" select bit. Set to 0 if Device/Head Register: DEV bit is set to "0".
7-5-3-13. Command Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Command Read/Write W
If a command is written to this register, the drive number in Socket and Copy Register and DRV bit in Device/Head Register are compared: only if matched, the command starts to run. For detailed operation of this register, refer to the outline description of ATA commands as well as ATA/ATAPI-5 standard.
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TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
7-5-3-14. Duplicate Even Data Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Duplicate Even Data Initial Value Read/Write Unidentified R/W
This register is the same as the ATA Data Register.
7-5-3-15. Duplicate Odd Data Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Duplicate Odd Data Initial Value Read/Write Unidentified R/W
Accessing from low ranks (D7~D0) or high ranks (D15~D8), this register can be accessed only data of odd addresses.
7-5-3-16. Duplicate Features Register
Address D7 D6 D5 D4 D3 D2 D1 D0
Duplicate Features byte Read/Write W
This register is the same as the ATA Feature Register.
7-5-3-17. Duplicate Error Register
Address D7 BBK Initial Value Read/Write 0 D6 UNC 0 D5 MC 0 D4 IDNF 0 R D3 MCR 0 D2 ABRT 0 D1 TKNOF 0 D0 AMNF 1
This register is the same as the ATA Error Register.
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PAGE NO. 44
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8. ATA COMMAND
8-1. ATA COMMAND BLOCK
ATA Command Block is a generic name of seven registers used to transmit command using the ATA Command protocol. By interpreting the register value, address specify mode is determined which is used to specify the address of media connected with TC6374AF. CHS Addressing mode and LBA Addressing mode are supported.
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command Device Register Command Register 7 6 5 4 3 2 1 0
Features Register Sector Count Register Sector Number Register Cylinder Low Register Cylinder High Register Head Register
8-2. Operation of ATA COMMAND BLOCK REGISTER
A command is issued to TC6374AF, after necessary parameters are written to the relevant registered within Command Block, then the command code is written to the Command register. Reception of command has three classes (ND = Non Data Command, PI = PIO Data-In Command, PO = PIO Data-out Command). To receive all commands, BSY = "0 "("L" : negate) must be applicable in principle. If commands for ND and PI are accepted, TC6374AF sets BSY to H within 400 ns. By accepting PO command, TC6374AF sets BSY to H within 400 ns, sets up the sector buffer for the write operation, sets DRQ to H within 700 s (For WRITE MULTIPLE command, sets DRQ to H within 20 ms), then clears BSY to L within 400ns after DRQ is set to "H".
Note: If set to the power-down mode(If oscillation module or oscillator with oscillation control function are used, the state automatically moves to the self-powerdown mode, i.e. a powerdown mode, when no access occurs from host within 5ms. For detailed operation of the power-down mode, refer to the description below), oscillation module or oscillator with oscillation control function connected with TC6374AF stops its operation, then DRQ can not be set to "H" within700 s. Note: For PO, DRQ is so fast set to "H", then BSY signal transition to BSY may take too short time for the host to recognize BSY = "H". Note: If, when TC6374AF is still processing a command (Old Command), another command is issued, the TC6374AF will not respond to the new command.
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PAGE NO. 45
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-3. ATA COMMAND CODE and PARAMETERS 8-3-1. STANDARD ATA COMMAND
proto ND DD ND ND PI ND ND ND PI PI PI ND ND ND ND ND ND ND ND PO PO PO Command CHECK POWER MODE EXECUTE DEVICE DIAGNOSTIC FLUSH CASHE GET MEDIA STATUS IDENTIFY DEVICE IDLE IDLE IMMEDIATE INITIALIZE DEVICE PARAMETERS READ BUFFER READ MULTIPLE READ SECTOR (S) READ VERIFY SECTOR (S) RECALIBRATE SEEK SET FEATURE SET MULTIPLE MODE SLEEP STANDBY STANDBY IMMEDIATE WRITE BUFFER WRITE MULTIPLE WRITE SECTOR (S) typ M M M O M M M M O M M M O M M M M M M O M M Command Code 98h, E5h 90h E7h Dah Ech 97h, E3h 95h, E1h 91h E4h C4h 20h, 21h 40h, 41h 1xh 70h EFh C6h 99h, E6h 96h, E2h 94h, E0h E8h C5h 30h, 31h y y y y y y y y y y y y y y y y y y y y y y y y y y y y Parameters Used FR SC y y y y SN CY DH D y D D D D D y D y y y y y y D D D D D y y
Note: The command codes, marked with a waved underline, are defined as "retired" or "obsolete" in ATA/ATAPI-5 standard, though, to maintain the compatibility with the past technologies, TC6374AF will support these. TC6374AF supports no DMA mode, i.e. not supporting READ DMA command and WRITE DMA command.
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PAGE NO. 46
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-3-2. VENDOR UNIQUE COMMAND
proto ND ND Command CHECK SD EXTENSION SD HEADER typ V V V V V V V V V V V V Command Code D1h D2h D3h D4h D5h F7h Feh F6h F1h F8h F9h F0h y y y y y y y y y y y y y Parameters Used FR SC y y y y SN y y y CY y y y DH y y y y D D D D
ND PI SD EXECUTE PO PI ND PI PO PI ND ND PI PO RETRIEVE RESPONSE SD DATA OUT READ MEDIA UNIQUE ID UPDATE FIRMWARE READ FIRMWARE VENDOR TEST ENABLE SmartMediaTM BLOCK ERASE SmartMediaTM READ SmartMediaTM WRITE
proto = command protocol, ND = Non-data command, DD = EXECUTE DEVICE DIAGNOSTIC, PO = PIO data-out command, PI = PIO data-in command, typ = Command type, O = Optional, M = Mandatory, V = Vendor specific Implementation, FR = Feature register(see command descriptions for use), SC = Sector Count register, SN = Sector Number register, CY = Cylinder register, DH = Device/Head register, y = the register contains a valid parameter for this command. For the Device/Head register, y means both the device and head parameters are used. D = only the device parameter is valid and not the head parameter. d = the device parameter is valid. The usage of the head parameter vendor specific.
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PAGE NO. 47
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-4. Error indication report of ATA COMMAND
Command Name CHECK POWER MODE EXECUTE DEVICE DIAGNOSTIC FLUSH CASHE GET MEDIA STATUS IDENTIFY DEVICE IDLE IDLE IMMEDIATE INITIALIZE DEVICE PARAMETERS READ BUFFER READ MULTIPLE READ SECTOR (S) READ VERIFY SECTOR (S) RECALIBRATE SEEK SET FEATURE SET MULTIPLE MODE SLEEP STANDBY STANDBY IMMEDIATE WRITE BUFFER WRITE MULTIPLE WRITE SECTOR (S) CHECK SD EXTENSION SD HEADER SD EXECUTE RETRIEVE RESPONSE SD DATA OUT READ MEDIA UNIQUE ID UPDATE FIRMWARE READ FIRMWARE VENDOR TEST ENABLE SmartMediaTM BLOCK ERASE SmartMediaTM READ SmartMediaTM WRITE V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V Error Register UNC(WP) IDNF ABRT V V V *2 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V TKON AMNF Status Register ERR V
V = Varies with Executing this Command. *1 = Please refer to the command explanation. *2 = Only "0" is effective.(Negative logic)
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PAGE NO. 48
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5. General description of ATA COMMAND 8-5-1. STANDARD ATA COMMAND
8-5-1-1. CHECK POWER MODE - 98h, E5h
This command is used to check the current power mode in TC6374AF. If, when this command is issued, the oscillation module is operating, TC6374AF sets BSY and Sector Count Register to "FFh". Then, BSY is cleared and generates an interrupt. If the oscillation modules is in the oscillation stop state or the oscillation stop timer is set, TC6374AF sets BSY and sets Sector Count Register to"00h". Then, it clears BSY and generates an interrupt.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 98h or E5h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Note: Command code "98h" is defined in ATA/ATAPI-5 standard as "Retired", though, to maintain the compatibility with previous specifications, TC6374AF will still support it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A Result Value(00h or FFh) N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Sector Count Register = "00h" (if oscillation module is in the oscillation stop mode or ioscillation stop timer is set) Sector Count Register = "FFh" (if oscillation module is under operation)
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PAGE NO. 49
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
Error Register: ABRT = "1" (Aborted Command)
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PAGE NO. 50
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-2. EXECUTE DEVICE DAIGNOSTIC - 90h
In TC6374AF, this command only judges whether reset processing was performed normally.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (1) N/A (1) DEV 90h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status BSY(0) DRDY(1) DF(0) 7 6 5 4 3 2 1 0
Diagnostic Code (01h) Signature (01h) Signature (01h) Signature (00h) Signature (00h) Signature (00h) DSC(1) DRQ(0) CORR(0) IDX(0) ERR(0)
Error Register = "01h"(Reset processing normal end)
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status BSY(0) DRDY(1) DF(0) 7 6 5 4 3 2 1 0
Diagnostic Code (02h) Signature (01h) Signature (01h) Signature (00h) Signature (00h) Signature (00h) DSC(1) DRQ(0) CORR(0) IDX(0) ERR(0)
Error Register = "02h"(Reset processing abnormal end, un-initializing of media, or initialization is impossible.)
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PAGE NO. 51
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-3. FLUSH CASHE - E7h
This command is used to write the write cache data internal the TC6374AF to the media. It, however, operates the register only because TC6374AF has no built-in write cache.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV E7h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
If, the data in the write cache is written to the media, an uncorrectable error occurs, the first sector address, in which the error occurs, is notified from Sector Number, Cylinder Low, Cylinder High register. TC6374AF
has no such errors based on the specification.
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A Sector number or LBA Cylinder low or LBA Cylinder high or LBA DEV DSC(1) DRQ(0) N/A CORR(0) IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register : ABRT = "1" (Aborted Command)
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PAGE NO. 52
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-4. GET MEDIA STATUS - DAh
This command is prepared in order to check the state of media.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV DAh 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 WP 5 (0) 4 (0) N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(1) 3 (0) 2 ABRT 1 (0) 0 (0)
Error Register:
WP = "1" (Write Protected Media) Reports status of Write protect switch and Write protect seal. "Permanent write protection" and "Temporary write protection" will also be reported when SD memory card or MultiMediaCard is inserted. ABRT = "1" (Aborted Command)
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PAGE NO. 53
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-5. IDENTIFY DEVICE - ECh
This command allows the host to receive from TC6374AF the parameter information (IDENTIFY DEVICE INFORMATION) as shown in the next page. By issuing this command, TC6374AF sets BSY and enters the parameter information requested to the sector buffer to set DRQ, then generates an interrupt. Thus, the host can parameter information from the sector buffer.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV ECh 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 54
TC6374AF Hardware Datasheet
IDENTIFY DEVICE INFORMATION
Rev. 1.22
02/2/15
This is default data while using SD card of 32MB. Note: Marked * of Word Address means to depend on Media Capacity.
Word Address 0 1 2 *3 4 5 *6 7 8 9 10- 19 20 21 22 23- 26 27- 46 47 48 49 50 51 52 53 * 54 * 55 * 56 * 57- 58 59 * 60- 61 62 63 64-127 128-159 160-175 176 * Default Value of Data 848Ah 01DBh 0000h 0004h 4000h 0200h 0020h 0000h 0000h 0000h 0000h 0001h 0001h 0004h aaa--aa aaa--aa 0001h 0000h 0200h 0000h 0200h 0000h 0001h 01DBh 0004h 0020h 0000ED80h 0000h 0000ED80h 0000h 0000h 0000h 0000h 0000h 000Dh Number of Bytes 2 2 2 2 2 2 2 2 2 2 20 2 2 2 8 8 40 2 2 2 2 2 2 2 2 2 4 2 4 2 2 128 64 16 2 Information of Data Bit Information of General Configration Number of Cylinders Reserve Head Numbers Unformatted byte numbers per track Unformatted byte numbers per sector Sector Numbers per track Vender Unique Vender Unique Vender Unique Serial Number Buffer Type Buffer Size of 512Byte unit ECC byte numbers pass through Read/Write Long Command (Default Value) Firmware numbers (Ver.1.1) [5665,722E,312E,3120 h] Model Number (Products Version Information of Attribute memory) [2020,2020,2020,2020,2020,2020,2020,2020,2020,2020, 2020,2020,2020,2020,2020,2020,2020,2020,2020,2020 h] Maximum transferred Sector Numbers per Read/Write Multiple command interruption=1 No Double Word (32bit) Support LBA Support, No DMA Transfer capacity Reserve PIO Data Transfer Timing DMA Data Transfer Timing Validity of registered area by Conversion Mode Current Cylinder Numbers (*1) Current Head Numbers (*2) Current Sector Numbers (*3) per track Current Sector Capacity = (*1) x (*2) x (*3) No Option Set about Multiple Sector Transfer Sector Capacity in LBA Mode No Single Word DMA Data Transfer Support No Multiple DMA Data Transfer Support Reserve Vender Unique Reserve SDA Command Mode Bit3:D5h Support Bit2:512 byte Fixed Transfer Bit0:Secure Command Support Others: Reserve For D3h, Transfer byte numbers (2^9=512) in Current Multiple Transfer For D3h, Transfer byte numbers (2^9=512) in Minimum Multiple Transfer For D3h, Transfer byte numbers (2^9=512) in Maximum Multiple Transfer For D3h, Transfer byte numbers (2^9=512) in Maximum Single Transfer Reserve
177 178 179 180 160-255
0009h 0009h 0009h 0009h 0000h
2 2 2 2 192
Note: IDENTIFY DEVICE INFORMATION is stored in the NOR flash memory used for TC6374AF firmware. As the aforementioned data is used for the reference data (DEFAULT IDENTIFY DEVICE INFORMATION), it may be modified if so requested. Modification data must be submitted on a 256 word basis. DEFAULT IDENTIFY DEVICE INFORMATION will not assure the precise operation.
TOTAL 125
PAGE NO. 55
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-6. IDLE - 97h, E3h
If this command is issued, TC6374AF sets BSY and moves to the Idle mode. Then, it clears BSY and generates an interrupt, which is generated even if TC6374AF is not completely moved to the Idle mode. With Sector Count Register set to any values other than "00h", the auto-power-down sequence is permitted and a countdown immediately starts. After the time set in the Sector Count Register elapses, the oscillation stops. During the power-down, the state allows for accepting commands. If Sector Count Register is set to "00h", the auto-power-down sequence is prohibited.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 97h or E3h 7 6 5 4 N/A Timer period value (5 ms x Timer period value) N/A N/A N/A N/A 3 2 1 0
Sector Count Register = setting of auto-power-down sequence "00h": auto-power-down sequence prohibited "Other than 00h": auto-power-down permitted
Note: Command code "97h" is defined in ATA/ATAPI-5 standard as "Retired", though, to maintain the compatibility with the previous specification, TC6374AF still supports it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
TOTAL 125
PAGE NO. 56
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
Error Register: ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 57
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-7. IDLE IMMEDIATE - 95h, E1h
This command performs a NOP operation in TC6374AF. Even during the power-down in this state, command can be accepted.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 95h or E1h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Note: Command code "95h" is defined in ATA/ATAPI-5 standard as "Retired", though, to maintain the compatibility with the previous specification, TC6374AF still supports it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register: ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 58
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-8. INITIALIZE DEVICE PARAMETERS - 91h
The host allows the host to specify the number of sectors per track and the number of heads per cylinder. If this command is issued, TC6374AF sets BSY then parameters. Then, BSY is cleared and an interrupt is generated. The validity in sector and head values is not verified in this command. When, if they were disabled, other command may generate an invalid access to notify the error.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 91h 7 6 5 4 N/A Logical sector per logical track N/A N/A N/A Max head 3 2 1 0
Sector Count Register = The number of sectors per track Head Register = The number of heads per cylinder -1
Note: TC6374AF automatically caluculates and sets the Number of Cylinders from the Number of Heads and Sectors per Track set by this command. Number of Cylinders comes from Maximum sector number devided by Number of heads and Sectors per track. Since the Number of Cylinder is an integer value, the residue will be truncated. TC6374AF CAN'T ACCESS (READ/ WRITE) THESE TRUNCATED AREA WITH CTHE CHS ADDRESSING MODE.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
TOTAL 125
PAGE NO. 59
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 60
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-9. READ BUFFER - E4h
The host uses this command to read the current value in TC6374AF sector buffer. With this command issued, TC6374AF sets BSY and sets up the sector buffer for the read operation. Then, it sets DRQ, clears BSY, and generates an interrupt. The host then reads from the sector buffer the latest 512 byte data stored immediately before.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV E4h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 61
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-10. READ MULTIPLE - C4h
Since this command is the same operation as "READ SECTOR (S)", refer to "READ SECTOR (S)" for it.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) LBA (1) 7 6 5 4 N/A Sector count Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV C4h Head number (LBA27 - LBA24) 3 2 1 0
Sector Count Register = Read sector number Sector Number, Cylinder, Head Register = start sector address
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A "00h" Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(0) 3 2 1 0
Sector Count Register = "00h" Sector Number, Cylinder, Head Register = last read sector address
TOTAL 125
PAGE NO. 62
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) 7 (0) 6 UNC 5 (0) 4 IDNF NA Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) DRQ 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
Head number (LBA27 - LBA24) CORR(0) IDX(0) ERR(1)
DRDY =" 0"
Status Register = "11h" Error Register = "04h" (Aborted Command)
Multiple prohibition
Status Register = "51h" Error Register = "04h" (Aborted Command)
Address over
Status Register = "59h" ("51h" after an end 512 byte data transfer) Error Register = "10h" (ID Not Found) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register = Sector address of address over
Uncorrectable data
Status Register = "59h" ("51h" after an end 512 byte data transfer) Error Register = "40h" (Uncorrectable Data Error) Sector Count Register =The rest of transfer sector number Sector Number, Cylinder, Head Register =Sector address of uncorrectable data
TOTAL 125
PAGE NO. 63
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-11. READ SECTOR (S) - 20h, 21h
This command allows the host to read 1-256 sectors specified in the TC6374AF Sector Count Register. Sector count 0 indicates the transfer request of 256 sectors. The transfer starts from the sector specified by Sector Number. Whether or not an error is present, before the data transfer, DRQ is always set. After this command is completed, task file is set to cylinder, head and sector numbers, which are lastly read. If an error occurs, the read operation stops at the sector where the error is generated. The task file is set to cylinder, head and sector numbers, where the error occurs. Data, in which an error occurs, remains in the sector buffer.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) LBA (1) 7 6 5 4 N/A Sector count Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV 20h or 21h Head number (LBA27 - LBA24) 3 2 1 0
Sector Count Register = number of sectors to be read ("00h": 256 sectors) Sector Number, Cylinder, Head Register = start sector address
Note : Command code "21h" is defined in ATA/ATAPI-5 standard as "Obsolete", however, to maintain the compatibility with the previous specifications, TC6374AF supports it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A "00h" Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(0) 3 2 1 0
Sector Count Register = "00h" Sector Number, Cylinder, Head Register = last read sector address
TOTAL 125
PAGE NO. 64
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) 7 (0) 6 UNC 5 (0) 4 IDNF NA Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) DRQ 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
Head number (LBA27 - LBA24) CORR(0) IDX(0) ERR(1)
DRDY = 0 Status Register = "11h"
Error Register = "04h" (Aborted Command)
Address over
Status Register = "59h" ("51h" after an end 512 byte data transfer) Error Register = "10h" (ID Not Found) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register =Secter address of address over
Uncorrectable data
Status Register = "59h" ("51h" after an end 512 byte data transfer) Error Register = "40h" (Uncorrectable Data Error) Sector Count Register =The rest of transfer sector number Sector Number, Cylinder, Head Register = Sector address of uncorrectable data
TOTAL 125
PAGE NO. 65
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-12. READ VERIFY SECTOER (S) - 40h, 41h
This command operates likely with READ SECTOR(S) command except that DRQ is not set and data is not transferred to the host. If the sector requested is verified, TC6374AF sets BSY and generates an interrupt. With this command completed, task file is set to the cylinder and sector numbers lastly verified. If an error occurs, the verify stops at the sector where the error occurs. The task file is set to the cylinder and sector numbers where the error occurs. Sector Count Register is set to the number of sectors that remains still unverified.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) LBA (1) 7 6 5 4 N/A Sector Count Sector Number (LBA7 - LBA0) Cylinder Low (LBA15 - LBA8) Cylinder High (LBA23 - LBA16) DEV 40h or 41h Head Number (LBA27 - LBA24) 3 2 1 0
Sector Count Register = Number of sectors to be verified ("00h": 256 sectors) Sector Number, Cylinder, Head Register = start sector address
Note : Command code "41h" is defined in ATA/ATAPI-5 standard as "Obsolete", though, to maintain the compatibility with previous specifications, TC6374AF still supports it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A "00h" Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(0) 3 2 1 0
Sector Count Register = "00h" Sector Number, Cylinder, Head Register = last verify sector address
TOTAL 125
PAGE NO. 66
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) 7 (0) 6 UNC 5 (0) 4 IDNF NA Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(1)
DRDY = " 0"
Status Register = "11h" Error Register = "04h" (Aborted Command)
Address over
Status Register = "51h" Error Register = "10h" (ID Not Found) Sector Count Register =No verify sector number Sector Number, Cylinder, Head Register =Sector address of address over
Uncorrectable data
Status Register = "51h" Error Register = "40h" (Uncorrectable Data Error) Sector Count Register =No verify sector number Sector Number, Cylinder, Head Register =Sector address of uncorrectable data
TOTAL 125
PAGE NO. 67
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-13. RECALIBRATE - 1xh
This command is used originally to move the head to the cylinder "00h", though, in TC6374AF, only the interface timing operation is performed. If this command is issued, TC6374AF sets BSY, then, after waiting for the appropriate time, updates the status, clears BSY and generates an interrupt. TC6374AF, after this command is normally completed, initializes the Command Block register.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) LBA (1) DEV 1xh 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Note: Command code "1xh" is defined in ATA/ATAPI-5 standard as "Retired" or "Obsolete", though, to maintain the compatibility with previous specifications, TC6374AF still supports it. Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A "01h" "00h" or "01h" "00h" "00h" "0h" CORR(0) IDX(0) ERR(0) 3 2 1 0
CHS Addressing Mode
Sector Count Register = "01h" Sector Number Register = "01h" Cylinder Register = "0000h" Head Register = "0h"
LBA Addressing Mode
Sector Count Register = "01h" Sector Number Register = "00h" Cylinder Register = "0000h"
Head Register = "0h"
TOTAL 125
PAGE NO. 68
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
NA CORR(0) IDX(0) ERR(1)
Error Register = "04h" (Aborted Command)
TOTAL 125
PAGE NO. 69
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-14. SEEK - 70h
This command is used to seek the track and select the head, both or which are specified by the task file. TC6374AF actually operates the interface timing and register. To issue this command, the media connected with TC6374AF are not required to format. TC6374AF sets DSC.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) LBA (1) 7 6 5 4 N/A N/A Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV 70h Head number (LBA27 - LBA24) 3 2 1 0
Sector Number, Cylinder, Head Register = Seek sector address
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
TOTAL 125
PAGE NO. 70
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 IDNF NA NA NA NA 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
NA CORR(0) IDX(0) ERR(1)
DRDY = "0"
Status Register = "11h" Error Register = "04h" (Aborted Command)
Address over
Status Register = "51h" Error Register = "10h" (ID Not Found) Sector Number, Cylinder, Head Register =Sector address of address over
TOTAL 125
PAGE NO. 71
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-15. SET FEATURES - EFh
This command allows the host originally to modify the operation of function owned by TC6374AF, though, in TC6374AF, NOP is performed even if parameters shown below other than Subcommand codes "95h" and "ECh" are set.
Inputs The case of Subcommand Code is other than "ECh"
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV EFh 7 6 5 4 3 2 1 0
Subcommand code N/A N/A N/A N/A N/A
The case of Subcommand Code is "ECh"
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) 7 6 5 4 3 2 1 0
Subcommand code ("ECh") Subcommand specific ("FFh") Subcommand specific ("FFh") Subcommand specific ("FFh") Subcommand specific ("FFh") DEV EFh "Fh"
SET FEATURES register definitions
Subcommand code Value 01h 55h 66h 81h 95h 9Ah BBh CCh ECh Operation Enable 8-bit PIO transfer mode Disable read look-ahead feature Disable reverting to power on default Disable 8-bit PIO transfer mode Enable media status notification Obsolete. Obsolete Enable reverting to power on default Get media information TC6374AF internal operation D5"IOis8"bit of FCR Card Configuration & Status Register is affected. IOis8 = "1" NOP NOP D5"IOis8"bit of FCR Card Configuration & Status Register is affected. IOis8 = "0" Please refer the Normal Outputs description. NOP NOP NOP Please refer the Normal Outputs description.
In power injection or after hardware reset, it's set as "81h".
TOTAL 125
PAGE NO. 72
TC6374AF Hardware Datasheet
Normal Outputs The case of Subcommand Code is "95h", other than "ECh"
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A 3
Rev. 1.22
02/2/15
2
1
0
N/A CORR(0) IDX(0) ERR(0)
The case of Subcommand Code is "95h"
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (0) (1) BSY(0) (0) N/A DRDY(1) (0) (1) DF(0) 7 6 5 4 N/A N/A N/A VER("00h") (0) DEV DSC(1) DRQ(0) (0) PEJ(0) N/A CORR(0) IDX(0) ERR(0) LOCK(0) PENA 3 2 1 0
PENA = "1" (When this command is already received) PENA = "0" (When this command is received for the first time)
The case of Subcommand Code is "ECh"
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status BSY(0) DRDY(1) DF(0) 7 6 5 4 N/A "5Dh" "53h" "43h" "50h" "xBh" DSC(1) DRQ(0) CORR(0) IDX(0) ERR(0) 3 2 1 0
If register's return value takes the above state, TC6374AF stores in the read write buffer 10 byte information (Media Information). With READ BUFFER command, the following information can be read out.
TOTAL 125
PAGE NO. 73
TC6374AF Hardware Datasheet
Media Information
Byte Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 Byte 7 Byte 8 Byte 9 Media Information A type of media (0 : SmartMediaTM, 1 : SD Memory Card, 2 : MultiMediaCard
Rev. 1.22
02/2/15
SD Memory Card, MultiMediaCard : Write block length & Read block length, SmartMediaTM : Sector counts/block SD Memory Card, MultiMediaCard : C_SIZE (7 - 0), SmartMediaTM : Dummy data SD Memory Card, MultiMediaCard : C_SIZE (11 - 8), SmartMediaTM : Dummy data SD Memory Card, MultiMediaCard : C_SIZE_MULTI, SmartMediaTM : Dummy data SD Memory Card, MultiMediaCard : ERASE_BLOCK_LEN & SECTOR_SIZE, SmartMediaTM : Dummy data SD Memory Card : SIZE_OF_PROTECTED_AREA (7 - 0), MultiMediaCard, SmartMediaTM : Dummy data SD Memory Card : SIZE_OF_PROTECTED_AREA (15 - 8), MultiMediaCard, SmartMediaTM : Dummy data SD Memory Card : SIZE_OF_PROTECTED_AREA (23 - 16), MultiMediaCard, SmartMediaTM : Dummy data SD Memory Card : SIZE_OF_PROTECTED_AREA (31 - 24), MultiMediaCard, SmartMediaTM : Dummy data
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) DEV DSC(1) DRQ(0) CORR(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA NA IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
DRDY = "0" Status Register = "11h"
Error Register = "04h" (Aborted Command)
Not supporting parameter
Status Register = "51h" Error Register = "04h" (Aborted Command)
TOTAL 125
PAGE NO. 74
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-16. SET MULTIPLE MODE - C6h
This command is used originally to allow TC6374AF to execute READ MULTIPLE and WRITE MULTIPLE operations. Sector Count Register is allowed to set "00h" and "01h". In TC6374AF, this command is also issued to execute READ MULTIPLE and WRITE MULTIPLE commands.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV C6h 7 6 5 4 N/A Sectors per block ("00h" or "01h") N/A N/A N/A N/A 3 2 1 0
Sector Count Register = The number of sector per block "00h" = Multiple command prohibited "01h" = Multiple command permitted Other than "00h", "01h" = Multiple command prohibited
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
TOTAL 125
PAGE NO. 75
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
NA CORR(0) IDX(0) ERR(1)
DRDY =" 0"
Status Register = "11h" Error Register = "04h" (Aborted Command)
Not supporting block size (Sector Count Register = Other than "00h", "01h")
Status Register = "51h" Error Register = "04h" (Aborted Command)
TOTAL 125
PAGE NO. 76
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-17. SLEEP - 99h, E6h
This command is used to move TC6374AF to the Sleep mode. By executing a hardware reset or software reset or accepting ATA command, TC6374AF returns from the Sleep mode. In Sleep mode, ATA Status Register: D6 bit "DRDY" is set to "H"(Ready). If, in Sleep mode, ATA command is issued, it recovers and processes the command. If this command is issued, TC6374AF moves immediately to the power-down mode. Oscillation module then stops.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 99h or E6h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Note: Command code "99h" is defined in ATA/ATAPI-5 standard as "Retired", though, to maintain the compatibility with previous specifications, TC6374AF will still support it. Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) CORR(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA NA IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 77
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-18. STANDBY - 96h, E2h
This command allows TC6374AF to set BSY and move the state to the Standby mode. Then, it clears BSY and generates an interrupt. Interrupt is generated even if TC6374AF is not completely moved to the Standby mode. Whichever value the Sector Count Register is set to, TC6374AF immediately moves to the power-down mode and the oscillation module stops. If, when Sector Count Register is set to "00h", it accepts a command after it is once turned off, then it will no more move to the power-down mode. If, when Sector Count Register is set to other than "00h", it accepts a command after it is once turned off, then the countdown starts soon after the command is completed with auto-power-down sequence being permitted. When the time specified in Sector Count Register elapses, the oscillation stops. During the power-down, the state can accepts ATA command.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 96h or E2h 7 6 5 4 N/A Time period value (5 ms x Timer Count) N/A N/A N/A N/A 3 2 1 0
Sector Count Register = setting of auto-power-down sequence "00h" : auto-power-down sequence prohibited Other than "00h" : auto-power-down permitted
Note: Command code "96h" is defined in ATA/ATAPI-5 standard as "Retired", though, to maintain the compatibility with previous specifications, TC6374AF supports it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
TOTAL 125
PAGE NO. 78
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
NA CORR(0) IDX(0) ERR(1)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 79
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-19. STANDBY IMMEDIATE - 94h, E0h
This command is used to cause TC6374AF to set BSY and enter the Standby mode. Then, it clears BSY and generates an interrupt. The interrupt is generated even if TC6374AF is not completely enter the Standby mode. TC6374AF moves, immediately after this command is issued, to the power-down mode. The oscillation will stop. If, once the power-down is performed, the command is accepted, then auto-powerdown sequence starts based on the value of Sector Count Register set by STANDBY and IDLE commands. Even during the power-down operation, the state can accept ATA command.
Input
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV 94h or E0h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Note: Command code "96h" is defined in ATA/ATAPI-5 standard as "Retired", though, to maintain the compatibility with previous specifications, TC6374AF supports it. Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) CORR(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA NA IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 80
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-20. WRITE BUFFER - E8h
This command allows the host to replace TC6374AF data buffer value with data pattern you want. Buffer area allows 512 byte address access, which is same with the read buffer area.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) N/A (1) DEV E8h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(0) 3 2 1 0
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) CORR(0) 7 (0) 6 (0) 5 (0) 4 (0) NA NA NA NA NA IDX(0) ERR(1) 3 (0) 2 ABRT(1) 1 (0) 0 (0)
Error Register : ABRT = "1" (Aborted Command)
TOTAL 125
PAGE NO. 81
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-21. WRITE MULTIPLE - C5h
Since this command is the same operation as "WRITE SECTOR (S)", refer to "WRITE SECTOR (S)" for it.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device/Head Command (1) LBA (1) 7 6 5 4 N/A Sector count Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV C5h Head number (LBA27 - LBA24) 3 2 1 0
Sector Count Register = written sector number Sector Number, Cylinder, Head Register = sector address
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A "00h" Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(0) 3 2 1 0
Sector Count Register = "00h" Sector Number, Cylinder, Head Register = last write sector address
TOTAL 125
PAGE NO. 82
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status (1) BSY(0) N/A DRDY (1) DF(0) 7 (0) 6 WP 5 (0) 4 IDNF 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
Sector count Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(1)
DRDY =" 0"
Status Register = "11h" Error Register = "04h" (Aborted Command)
Multiple prohibition
Status Register = "51h" Error Register = "04h" (Aborted Command)
Address over
Status Register = "51h" Error Register = "10h" (ID Not Found) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register =Sector address of address over
No empty block
Status Register = "51h" Error Register = "04h" (Aborted Command) Sector Count Register =The rest of transfer sector number Sector Number, Cylinder, Head Register = Miswritten sector address
Write Protected Media (SD Memory Card/MultiMediaCardCSD is generated to Permanent write Protection, Temporary Write Protection by Media write protect switch and seal.)
Status Register = "51h" Error Register = "40h" (Write Protected Media) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register =Miswritten sector address
TOTAL 125
PAGE NO. 83
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-1-22. WRITE SECTOR (S) - 30h or 31h
This command allows host to write data to the media. Set sector count ("00h" stands for 256 sector.) to sector count register and begin writing head sector address set to register. After completing this command, the last sector address remains in the register. If error has been occurred when writing multiple sectors, the writing operation will be stopped and the sector address remains in the register.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (1) LBA (1) 7 6 5 4 N/A Sector count Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV 30h or 31h Head number (LBA27 - LBA24) 3 2 1 0
Sector Count Register = Sector numbers to be written ("00h"= 256 sectors) Sector Number, Cylinder, Head Register = Sector address
Note: Command code "31h" is defined in ATA/ATAPI-5 standard as "Obsolete", though, to maintain the compatibility with previous specifications, TC6374AF still supports it.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A "00h" Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(0) 3 2 1 0
Sector Count Register =" 00h" Sector Number, Cylinder, Head Register = Most recent write sector address
TOTAL 125
PAGE NO. 84
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY (1) DF(0) 7 (0) 6 WP 5 (0) 4 IDNF 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
Sector count Sector number (LBA7 - LBA0) Cylinder low (LBA15 - LBA8) Cylinder high (LBA23 - LBA16) DEV DSC(1) Head number (LBA27 - LBA24) DRQ(0) CORR(0) IDX(0) ERR(1)
DRDY = 0
Status Register = "11h" Error Register = "04h" (Aborted Command)
Address over
Status Register = "51h" Error Register = "10h" (ID Not Found) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register = Sector address of address over
No empty block
Status Register = "51h" Error Register = "04h" (Aborted Command) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register = Miswritten sector address
Write Protected Media (SD Memory Card/MultiMediaCardCSD is generated to Permanent write
Protection, Temporary Write Protection by Media write protect switch and seal.) Status Register = "51h" Error Register = "40h" (Write Protected Media) Sector Count Register = The rest of transfer sector number Sector Number, Cylinder, Head Register =Miswritten sector address
TOTAL 125
PAGE NO. 85
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-2. VENDOR UNIQUE ATA COMMAND
8-5-2-1. CHECK SD EXTENSION - D1h
This command is used to check if ATA command for SD memory card (ATA SD extension set) is supported or not.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (1) N/A (1) DEV D1h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0 ENB
ENB =
Provided to check Media Card Pass Through Command is supported or not. And, allow / prohibit the Media Card Pass Through Command after this command is issued. "1" = Allow Media Card Pass Through Command. (D2h-D4h command) "0" = Prohibit Media Card Pass Through Command. (D2h-D4h command)
TOTAL 125
PAGE NO. 86
TC6374AF Hardware Datasheet
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A 55h AAh RCA Bit 7 - 0 RCA Bit 15 - 8 DEV DSC(1) WP DRQ(0) 3
Rev. 1.22
02/2/15
2
1
0
Media type CORR(0) IDX(0) ERR(0)
Sector Count Register = Sector Number Register = Cylinder Low Register =
Signature ("55h") Signature ("AAh") RCA: Reports RCA lower byte (Bit7 - 0) which is to be uset for SD command argument.
Cylinder High Register =
RCA: Reports RCA upper byte (Bit15 - 8) which is to be used for SD command argument. WP: Reports write protect status set by media's write protect switch. When using SD Memory Card / MultiMediaCard, reports Permanent Write Protection status and Temporary Write Protection status by CSD. "1" = Write Protected Media "0" = No Write Protected Media Media Type: Reports kind of media. "001b" = SD Memory Card
Head Register =
TOTAL 125
PAGE NO. 87
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
When SmartMediaTM or MultiMediaCard is inserted
Status Register = "51h" Error Register = "04h" (Aborted Command)
Notes: #1. After this command is issued, SD Memory Card goes to transfer mode/ 4-bit bus width/ optimizedclock (MAX.16MHz) state. #2. Be sure to check Standard ATA Command is completed before issuing this command. #3. Be sure to issue this command and check "Dxh" Vendor Unique Command is available or not before issuing "Dxh" Vendor Unique Command. #4. "Dxh" Vendor Unique Command can't be issued if SD IO Card or locked SD Memory Card is inserted because ATA Status Register's DRDY "D6" bit does not turn "H". Standard ATA Command can't be issued either.
TOTAL 125
PAGE NO. 88
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-2-2. SD HEADER - D2h
This command transfers Header portion of SD command to TC6374AF. After this command is issued, the host must issue SD EXECUTE command.
Inputs
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (0) (1) ACMD N/A (1) DEV D2h 7 6 5 4 3 2 1 0
SD Command Argument 4 (Bit 15 - 8) SD Command Argument 3 (Bit 23 - 16) SD Command Argument 2 (Bit 31 - 24) SD Command Argument 1 (Bit 39 - 32) SD Command Index (Bit 45 - 40) Response Type
Features, Sector Count, Sector Number, Cylinder Low Register, Cylinder High Register = Set SD command's Bit 8 - 45. Cylinder High Register = ACMD: Specify the command in the SD Command Index is CMD or ACMD. 0: CMD (The controller issuees command in the SD Command Index.) 1: ACMD (The controller issues CMD55 before issuing the command in the SD Command Index.) Head Register = Set Response Type as followings. "0011b" : "0100b": "0101b" : "0110b" : "0111b" : No Response R1, R6 (,R4, R5) R1b R2 R3
"0000b" - "0010b", "1000b" - "1111b" : Reserved (Above Reserved codes are not supported by TC6374AF.)
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 6 5 4 NA N/A N/A N/A N/A Response Type CORR(0) IDX(0) ERR(0) 3 2 1 0
Head Register = Report input value as the Response Type.
TOTAL 125
PAGE NO. 89
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
When Reserved code is issued
Status Register = "51h" Error Register = "04h" (Aborted Command)
When D1h command ENB bit = "0"
Status Register = "51h" Error Register = "04h" (Aborted Command)
Note: #1. This command can be issued to any media because the command does not make an access to media. Therefore, before issuing this command, issue "D1h" command and check SD Memory Card is sure to be inserted. #2. Don't change the SD Memory Card frequency when issuing "Dxh" command. Don't issue "Dxh" commands which needs low frequency. (Only CMD0 on the protocol.) #3. This controller sets the connected SD Memory Card bus width to as broad as possible. Don't issue Change bus width command in "Dxh" command. #4. Don't issue Change RCA commands in "Dxh" command. #5. Don't set CMD0, CMD2, ACMD6, ACMD41 to the SD Command Index. #6. After issuing Standard ATA Command, SD Memory Card goes to Transfer mode. Therefore, Be careful when issuing "Dxh" Vendor Unique Command after issuing Standard ATA Command. #7. Don't activate Permanent Write Protection and Temporary Write Protection on CSD by "Dxh" command.
TOTAL 125
PAGE NO. 90
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-2-3. SD EXECUTE - D3h
Input
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (1) N/A (1) 7 6 5 4 3 2 1 0
Subcommand Code (N/A) Data Transfer Length (LSB) Data Transfer Length (Middle Byte) Data Transfer Length (MSB) CRC (N/A) DEV D3h DATA BLKH (0) (0) DIR
Features Register = Set Subcommand code. (See the table below. TC6374AF does not recognize these codes.) Sector Count, Sector Number, Cylinder Low Register = Set Data transfer Length. (Since the maximum block number of multiple block is 256 blocks, Cylinder Low
Register's Bit7 - 2 are invalid. Since the maximum length of the Single block is 512 bytes, Sector Number Register's Bit7 - 2 and Cylinder Low's all bits are invalid. Available value of the Data Transfer Length is power of 2 (2 ; 1n9; n=integer). i.e. 2, 4, 8, 16, 32, 64, 128, 256, 512 bytes. Data transfer is done by word length, so, Sector Count Register's Bit0 is invalid.)
n
Cylinder High Register = Set CRC. (TC6374AF does not recognize this code.) Head Register = Specify with/ no data to DATA. "0": No data transfer "1": With data transfer Specify single/ multiple sector to BLKH. "0": Single sector transfer "1": Multiple sector transfer Specify data direction to DIR. "0": Read from SD Memory Card "1": Write to SD Memory Card
Subcommand Code
Subcommand D0h D1h D2h 00h - CFh, D3h - FFh Protocol Non-data command PIO data-in command PIO data-out command Reserved Data 0 1 1 Direction 0 or 1 0 1 -
TC6374AF does not use above Subcommand Codes. TC6374AF will neglect above codes.
TOTAL 125
PAGE NO. 91
TC6374AF Hardware Datasheet
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) 7 6 5 4 N/A Response bit 15 - 8 Response bit 23 - 16 Response bit 31 - 24 Response bit 39 - 32 DEV DSC(1) DRQ(0) 3
Rev. 1.22
02/2/15
2
1
0
N/A CORR(0) IDX(0) ERR(0)
Sector Count, Sector number, Cylinder Register = Report Response bit 8 - 39 (Response data for SD command).
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 UNC 5 (0) 4 (0) N/A N/A N/A N/A N/A CORR(0) IDX(0) ERR(1) 3 (0) 2 ABRT 1 (0) 0 (0)
When SmartMediaTM or MultiMediaCard is inserted
Status Register = "51h" Error Register = "04h" (Aborted Command) Time out error (250ms write timeout error) Status Register = "51h" Error Register = "04h" (Aborted Command) CRC error (response CRC error, 128 clock no response error, 250ms read timeout error, data CRC error, write CRC error) Status Register = "51h" Error Register = "40h" (Uncorrectable Data Error) When D1h command's ENB bit = "0" Status Register = "51h" Error Register = "04h" (Aborted Command) Note: Both 250ms write timeout error and 250ms read timeout error doesn't have any relation with SD Memory Card/ MultiMediaCard clock frequency. Timeout time is fixed to 250ms. TOTAL 125 PAGE NO. 92
TC6374AF Hardware Datasheet
Note:
Rev. 1.22
02/2/15
#1. Aborted Command error will be occurred when SD Memory Card is not inserted. DRQ bit will not goes to "H" even if it is during read request. #2. After this command has been issued, Standard ATA Command will initialize the media state (will not issue CMD0) and goes to transfer mode/ 4-bit bus width/ optimized clock frequency (Max.16MHz). #3. When you want to continue to issue "Dxh" command during/ after "Dxh" Vendor Unique Command, Don't execute ATA Soft Reset. TC6374AF automatically issues CMD00 when executing ATA Soft Reset. #4. Though this command is a READ command, DRQ bit will not be set when response CRC error or no response error. This command is a special command. #5. This command doesn't retry issuing CMD0 or ACMD0 when error has been occurred in SD Memory Card CMD or ACMD. Therefore, the host must retry issuing CMD or ACMD. The only exeption is a "D2h" command (ACMD-bit = "1") CMD13. TC6374AF automatically processes the routine in this command. #6. When ACMD is issued in "D2h" command (ACMD-bit = "1"), TC6374AF automatically issue CMD55 before issuing ACMD. On CMD55 has automatically issued, error process is as followings. For all errors, the return value of the ATA error register is "40h" when "D3h" command has been finished. (Host can't recognize whether the error has been occurred in CMD55 or in ACMD). When the host retries issuing ACMD by "D2h" command (ACMD-bit = "1") TC6374AF restart command routine from issuing CMD55. #6-1. When Card Status Error (any of ILLEGAL_COMMAND = "1", CC_ERROR = "1", ERROR = "1", APP_CMD = "0") occurred in CMD55: The command will immediately abort without executing CMD55 or ACMD. #6-2. When Response CRC error or No response error occurred in CMD55: Continuously issue CMD13 and wait until it goes back to Transfer mode. If it recognizes the first command as ACMD13, thus it will go back to the state before CMD55. And furthermore, the error occurs in CMD13 is as follows. #6-2-1. When the Card status error occurred in CMD13: Immediately abort. #6-2-2. When Response CRC error or No response error has been occurred in CMD13: Retries 10 times and abort if in vain. #6-2-3. When TC6374AF will not go back to transfer mode even if it issues CMD13: Abort if it won't go back to tranfer mode even if it retries more than 400msec.
TOTAL 125
PAGE NO. 93
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-2-4. RETRIEVE RESPONSE - D4h
This command get SD command response data which issued in advance. Response data will reported by data register as following Retrieve Response Data Format.
Input
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (1) N/A (1) DEV D4h 7 6 5 4 N/A Response Length N/A N/A N/A N/A 3 2 1 0
Sector Count Register = Set response data length (unit: byte) of the last issued SD command in Response Length.
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY (0) N/A DRDY (1) (1) DF (0) DEV DSC (1) DRQ (0) 7 6 5 4 N/A Response Data transferred in bytes N/A N/A N/A N/A CORR (0) IDX (0) ERR (0) 3 2 1 0
Sector Count Register = Transferred data size (unit: byte) will be reported in "Response Data transferred in bytes".
Retrieve Response Data Format
Word 0 1 2 3 4 5 6 7 8 9-255 48-bit Response Response bit 0-15 Response bit 16-31 Response bit 32-47 Reserved (00) Reserved (00) Reserved (00) Reserved (00) Reserved (00) Reserved (00) Reserved (00) 00000000 136-bit Response Response bit 0-15 Response bit 16-31 Response bit 32-47 Response bit 48-63 Response bit 64-79 Response bit 80-95 Response bit 96-111 Response bit 112-127 Response bit 128-135 Reserved (00)
TOTAL 125
PAGE NO. 94
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 (0) 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT(1)
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
When SmartMediaTM or MultiMediaCard is inserted
Status Register = "51h" Error Register = "04h" (Aborted Command)
When the ENB bit of the D1h command = "0"
Status Register = "51h" Error Register = "04h" (Aborted Command)
Note: TC6384 never reports "Aborted Command Error" when SD Memory Card is inserted and ENB bit of D1h command="1". TC6384AF always transfers register content to buffer in this condition.
TOTAL 125
PAGE NO. 95
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-2-5. SD DATA OUT - D5h
Note: This command is deleted from Firmware Revision 2.19. This command transfers TC6374AF read write buffer data to SD Memory Card. Used for data transfer less
than or equal to 512-bytes
Input
Bit Features Sector Count Sector Number Cylinder Low Cylinder High Device / Head Command (1) N/A (1) DEV D5h 7 6 5 4 N/A N/A N/A N/A N/A N/A 3 2 1 0
Normal Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY (0) N/A DRDY (1) (1) DF (0) DEV DSC (1) DRQ (0) 7 6 5 4 N/A N/A N/A N/A N/A N/A CORR (0) IDX (0) ERR (0) 3 2 1 0
TOTAL 125
PAGE NO. 96
TC6374AF Hardware Datasheet
Error Outputs
Bit Error Sector Count Sector Number Cylinder Low Cylinder High Device / Head Status (1) BSY(0) N/A DRDY(1) (1) DF(0) DEV DSC(1) DRQ(0) 7 (0) 6 UNC 5 (0) 4 (0) N/A N/A N/A N/A 3 (0)
Rev. 1.22
02/2/15
2 ABRT
1 (0)
0 (0)
N/A CORR(0) IDX(0) ERR(1)
When SmartMediaTM or MultiMediaCard inserted
Status Register = "51h" Error Register = "04h" (Aborted Command)
Time out error (50ms write time out error)
Status Register = "51h" Error Register = "04h" (Aborted Command)
CRC error
Status Register = "51h" Error Register = "40h" (Uncorrectable Data Error)
TOTAL 125
PAGE NO. 97
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
8-5-2-6. READ MEDIA UNIQUE ID - F7h
This command is used to read the unique ID in the removable media connected with TC6374AF. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL). SmartMediaTM ID requires the prior Nondisclosure Agreement with SmartMediaTM maker.
8-5-2-7. UPDATE FIRMWARE - FEh
This command is used to update TC6374AF firmware. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL).
8-5-2-8. READ FIRMWARE - F6h
This command is used to read TC6374AF firmware. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL).
8-5-2-9. VENDOR TEST ENABLE - F1h
This command is used to enable Vendor Unique Test command. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL).
8-5-2-10. SmartMediaTM BLOCK ERASE - F0h
This command is used to delete the data specified with SmartMediaTM physical block address. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL).
8-5-2-11. SmartMediaTM READ - F8h
This command is used to read the data specified with SmartMediaTM physical address. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL).
8-5-2-12. SmartMediaTM WRITE - F9h
This command is used to write the data specified with SmartMediaTM physical address. For detailed operation, refer to the attached document (TC6374AF VENDOR UNIQUE COMMAND MANUAL).
TOTAL 125
PAGE NO. 98
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
9. Reset operation
TC6374AF prepares four types of resets as described below.
9-1. Hardware rest by #PONRST terminal
TC6374AF performs a series of initialization processes to set initial values in ATA Command Block Register. After reset being cleared, the host interface returns to Memory Mapped mode. Default values in ATA Command Block Register are listed below: Error Register: "01h", Cylinder Low Register: "00h", Features Register: "81h", Cylinder High Register: "00h", Sector Count Register: "01h", Device/Head Register: "A0h", Sector Number Register: "01h", FCR Configuration Option Register SRESET"D7" bit : "0"
9-2. Hardware reset by RESET terminal
TC6374AF performs a series of initialization processes to set ATA Command Block Register to the initial values. After reset being cleared, the host interface returns to Memory Mapped mode. Default values in ATA Command Block Register are same with those for the hardware rest by #PONRST terminal.
9-3. Software reset by FCR Configuration Option Register:SRESET "D7" bit
TC6374AF performs a series of initialization processes to set ATA Command Block Register to the initial values. After reset being cleared, the host interface returns to Memory Mapped mode. Default values in ATA Command Block Register are same with those for the hardware rest by #PONRST terminal. This reset will not affect SRESET bit, thus set SRESET = "0" to clear the reset.
9-4. Software reset by ATA Device Control Register:SRST "D2" bit
TC6374AF resets the host interface circuit. This reset will not affect SRESET bit, thus set SRST= "0" to clear the reset. Whatever the Set Features command state is, all parameters before reset are saved. ATA Command Block Register except for Features Register, though, is initialized. ATA software reset function only is provided, but PC Card interface is not reset. Even if the reset process is performed at the completion of every command run, no parameters are cleared. Then, access may be performed without additional operations.
Note: When SD Memory Card is used, CMD0 is issued two times to initialize the media for all reset operations described above.
TOTAL 125
PAGE NO. 99
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
10. Control of low power consumption
TC6374AF prepares two modes of power supply: i.e. normal mode (oscillation state) and power-down mode (oscillation stop state). In addition, two modes of power-down operation are prepared: i.e. self-powerdown mode automatically performed by TC6374AF, and auto-powerdown mode performed by the power control using ATA commands(e.g. IDLE command). Both power-down modes assume the use of either oscillation module or oscillator with oscillation control function. In the self-powerdown mode, if no access from host for longer than about 5ms will automatically stop the oscillation by TC6374AF, entering the power-down mode. In the auto-power-down mode, the state moves to the powerdown mode depending on the then register value when ATA commands related with power control are issued. In the power-down mode, auto-power-down mode has a priority. For the auto-power-down operation, refer to the outline description of ATA commands.
TOTAL 125
PAGE NO. 100
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
11. NOR flash memory
TC6374AF connects with NOR flash memory, which contains: TC6374AF firmware 256 byte Card Information Structure 256 word Identify Device Information For NOR flash memory allowed to connect with TC6374AF, refer to "TC6374AF reference design description (reference circuit diagram and information sheet)". As the information is updated as necessary, keep the latest one by inquiry. For the AC/DC characteristics, refer the description that follows. Rewriting and confirming data in NOR flash memory connected with TC6374AF are supported by Vendor Unique Commands. For detailed information, refer to TC6374AF VENDOR UNIQUE COMMAND MANUAL.
TOTAL 125
PAGE NO. 101
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
12. Removable media memory capacity
12-1. SmartMediaTM
TC6374AF can be set as capacity as shown in the following table then used to SmartMediaTM.
Drive Capacity 1 Mbytes 2 Mbytes 4 Mbytes 8 Mbytes 16 Mbytes 32 Mbytes 64 Mbytes 128 Mbytes SmartMediaTM Capacity 8 Mbits 16 Mbits 32 Mbits 64 Mbits 128 Mbits 256 Mbits 512 Mbits 1 Gbit Number of Cylinders 125 125 250 250 500 500 500 500 Number of Heads 4 4 4 4 4 8 8 16 Sectors per Track 4 8 8 16 16 16 32 32 Number of Sectors 2,000 4,000 8,000 16,000 32,000 64,000 128,000 256,000
Moreover, refer to the SmartMediaTM logical format specification.
12-2. SD Memory Card/ MultiMediaCard
TC6374AF can be set as capacity as shown in the following table then used to SD Memory Card/ MultiMediaCard.
Drive Capacity 8Mbytes 16 Mbytes 32Mbytes 128 Mbytes 4Gbytes Memory Capacity Number of (Max. LBA) Cylinders (Max.) 4000h = 16,384 8000h = 32,768 10000h = 65,536 40000h = 262,144 800000h = 8,388,608 512 512 512 1,024 16,384 Number of Heads 4 2 4 8 16 Sectors per Track 8 32 32 32 32 Number of Sectors (Max.) 16,384 32,768 65,536 262,144 8,388,608
"Number of Heads" and "Sectors per Track" are fixed value. "Number of Cylinders" and "Number of Sectors" are reference data (not a fixed value). "Number of Cylinders" is a value which "memory capacity" (caluculated from media CSD) divided by "Number of Heads" and "Sectors per Track". Residue will be truncated. "Number of Sectors" never goes over "memory capacity". If the residue is not zero, the truncated sectors cannot be accessed (read/ write) by CHS addressing mode. Refer also to the specification of media logic format.
TOTAL 125
PAGE NO. 102
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
13. Recognizing the removable media
13-1. SmartMediaTM
TC6374AF recognizes the capacity of SmartMediaTM connected using SmartMediaTM Device ID. To check that physical format is performed after the normal Device ID is read from SmartMediaTM, the heading 10 bytes of "CIS/Identify Device Information Area", a valid heading block of SmartMediaTM, is compared. If Device ID not supported or illegal data from heading 10 bytes are found, they are prohibited to use(BSY state). In such case where the use prohibited (BSY state) occurs, format physically the SmartMediaTM using Vendor Unique ATA Command.
SmartMediaTM recognizeable Device ID is following.
SmartMediaTM 1 Mbytes 2 Mbytes 4 Mbytes 8 Mbytes 16 Mbytes 32 Mbytes 64 Mbytes 128 Mbytes Device ID "6Eh" "E8h" "ECh" "EAh" "E3h" "E5h" "E6h" "73h" "75h" "76h" "79h" 4 Mbytes 8 Mbytes 16 Mbytes 32 Mbytes 64 Mbytes 128 Mbytes "D5h" "D6h" "57h" "58h" "D9h" "DAh" Mask ROM type SmartMediaTM Device ID
Note: TC6374AF first accesses SmartMediaTM at the timing 1024s after #PONRST terminal and RESET terminal clears the reset, and #CD terminal detects the media. Thus, during this interval, perform the SmartMediaTM powering and stabilizing the terminal contact. Note that TC6374AF only supports 3.3V SmartMediaTM. 5V SmartMediaTM is not supported. For SmartMediaTM allowed to connect with TC6374AF, refer to "TC6374AF reference design description (reference circuit diagram and information sheet)". As the information is updated as necessary, keep the latest one by inquiry.
TOTAL 125
PAGE NO. 103
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
13-2. SD Memory Card/MultiMediaCard
- Media capacity Memory capacity is recognized by calculating the media CSD value with the formula shown below: Memory Capacity =((C_SIZE+1)*2^(C_SISE_MULT+2))*2^WRITE_BL_LEN Refer to the specification of each media. - CMD issued to media TC6374AF issues following commands to the media by itself or from STANDARD ATA COMMAND. CMD0 CMD2 CMD3 CMD7 CMD9 CMD10 CMD12 CMD13 CMD16 CMD17 CMD18 CMD24 CMD25 CMD55 ACMD6 ACMD 13 ACMD41 ACMD42 ACMD51 - Setting media bus width When using SD Memory Card, if error occurs setting the media bus width to 4-bit by ACMD6, TC6374AF treat the media as non-useable card. - Media block length TC6374AF can handle following length of READ_BL_LEN, WRITE_BL_LEN. Less than 512-bytes : Can't be used 512-bytes : Can be used More than 512-bytes : Can be used only when Pertial read/ write is allowed. On SD Memory Card, can be used when [{WRITE_BL_LEN = 10 (1024Bytes) or 11 (2048Bytes)} and {WRITE_BL_PARTIAL = 0}]. MultiMediaCard can't be used in above condition.
TOTAL 125
PAGE NO. 104
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
14. Others
TC6374AF is used to install the removal disk with the following characteristics. Note that values listed below are only for reference based on theoretical values or actual measurement.
14-1. System Performance
14-1-1. Toshiba 128MB SmartMediaTM
Media Transfer Rate Read (Total Time to Read 4MB Data) Write (Total Time to Write 4MB Data) Interface Transfer Rate Read/Write (Max) 5s 7s 8.0 Mbytes/s (2byte/250ns)
14-1-2. Matsushita 64MB SD Memory Card
Media Transfer Rate Read (Total Time to Read 4MB Data) Write (Total Time to Write 4MB Data) Interface Transfer Rate Read/Write (Max) 4s 5s 8.0 Mbytes/s (2byte/250ns)
14-1-3. SanDisk 16MB MultiMediaCard
Media Transfer Rate Read (Total Time to Read 4MB Data) Write (Total Time to Write 4MB Data) Interface Transfer Rate Read/Write (Max) 7s 27s 8.0 Mbytes/s (2byte/250ns)
Note: Media Transfer Rate listed above are actual measurement results. Note that values may depend on individual media and environment (PC). If customers describe such kind of data on their catalogue, use those based on their own measurements.
TOTAL 125
PAGE NO. 105
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
14-2. The Calculation of Read and Write Performance
14-2-1. SmartMediaTM
Assumptions SmartMediaTM Toshiba 64Mbyte Read time per sector Approx. 0.1ms Write time per sector Approx.0.3ms (for details, refer to "NAND type flash memory data sheet") Delete time per block (32 sectors) Approx.3ms (for details, refer to "NAND type flash memory data sheet") Controller process time required for newly writing 1-32 sectors at the address hit Approx. 2.1ms Controller process time required for newly writing 1-32 sectors at the address mishit Approx. 14.8ms Controller process time required for overwriting 1-32 sectors at the address hit Approx. 4.7ms Controller process time required for overwriting 1-32 sectors at the address mishit Approx. 17.4ms Controller process time required for reading 1-32 sectors at the address hit Approx. 0.2ms Controller process time required for reading 1-32 sectors at the address mishit Approx. 12.9ms Note) This controller only one zone of flash memory for address conversion table used to convert from host's logical address to the flash memory's physical address. If host's logical address is within the address conversion table (i.e. address hit), high-speed operation is available. If not found in the address conversion table (i.e. address mishit), address conversion table is reproduced followed by the subsequent processes, decreasing the performance. Read operation Read speed is calculated by: read time per sector (0.1ms) x sector count + controller process time for reading one sector at address hit or address mishit x sector count + main unit's transfer time Write operation Write speed depends on the sector count, sector number (write start address), write method, then the speed can not be generally identified. Actual examples are described below. Example1) Conditions sector count : 32 write start address : block heading write method: overwrite, at address hit write speed
TOTAL 125
PAGE NO. 106
TC6374AF Hardware Datasheet
delete time per block = 3ms write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 4.7ms
Rev. 1.22
02/2/15
As a result, 3 + 9.6 + 4.7 = approx. 17.3ms + main unit's transfer time Example2) Conditions sector count : 32 write start address : block heading write method: overwrite, at address mishit write speed delete time per block = 3ms write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 17.4ms As a result, 3 + 9.6 + 17.4 = approx. 30ms + main unit's transfer time Example3) Conditions sector count : 32 write start address : 2nd sector in block write method : overwrite, at address hit write speed delete time per 2 blocks= 6ms (3ms x 2) write time per 64 sectors= 19.2ms (0.3ms x 64) controller's process time for writing 64 sectors= 9.4 ms (4.7ms x 2) As a result, 6 + 19.2 + 9.4 = approx. 34.6ms + main unit's transfer time Example4) Conditions sector count : 32 write start address : 2nd sector in block write method : overwrite, at address mishit write speed delete time per 2 blocks= 6ms (3ms x 2) write time per 64 sectors= 19.2ms (0.3ms x 64) controller's process time for writing 64 sectors= 34.8ms (17.4ms x 2) As a result, 6 + 19.2 + 34.8 = approx. 60ms + main unit's transfer time Example5) Conditions sector count : 32 write start address : block heading write method : new, at address hit write speed TOTAL 125 PAGE NO. 107
TC6374AF Hardware Datasheet
write time per 32 sectors = 9.6ms (0.3ms x 32)
Rev. 1.22
02/2/15
controller's process time for writing 32 sectors = 2.1ms As a result, 9.6+2.1 = approx. 11.7ms + main unit's transfer time Example6) Conditions sector count : 32 write start address : block heading write method : new, at address mishit write speed write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 14.8ms As a result, 9.6+14.8 = approx. 24.4ms + main unit's transfer time Example7) Conditions sector count : 32 write start address : 2nd sector in block write method : new, at address hit write speed write per 64 sectors = 19.2ms (0.3ms x 64) controller's process time for writing 64 sectors = 4.2 ms (2.1ms x 2) As a result, 19.2 + 4.2 = approx. 23.4ms + main unit's transfer time Example8) Conditions sector count : 32 write start address : 2nd sector in block write method : new, at address mishit write speed write time per 64 sectors = 19.2ms (0.3ms x 64) controller's process time for writing 64 sectors = 29.6ms (14.8ms x 2) As a result, 19.2 + 29.6 = approx. 48.8ms + main unit's transfer time Example9) Conditions sector count : 1 write start address : block heading (same result, at the middle sector in a block) write method : overwrite, at address hit write speed delete time per block = 3ms write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 4.7ms As a result, 3 + 9.6 + 4.7 = approx. 17.3ms + main unit's transfer time TOTAL 125 PAGE NO. 108
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
Example10) Conditions sector count : 1 write start address : block heading (same result, at the middle sector in a block) write method : overwrite, at address mishit write speed delete time per block = 3ms write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 17.4ms As a result, 3 + 9.6 + 17.4 = approx. 30ms + main unit's transfer time Example11) Conditions sector count : 1 write start address : block heading(same result, at the middle sector in a block) write method : new, at address hit write speed write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 2.1ms As a result, 9.6+2.1 = approx. 11.7ms + main unit's transfer time Example12) Conditions sector count : 32 write start address : block heading (same result, at the middle sector in a block) write method : new, at address mishit write speed write time per 32 sectors = 9.6ms (0.3ms x 32) controller's process time for writing 32 sectors = 14.8ms As a result, 9.6+14.8 = approx. 24.4ms + main unit's transfer time The above values are derived using Toshiba SmartMediaTM with typical write/delete times. Use the maximum write/delete times of SmartMediaTM to derive actual values.
14-2-2. SD Memory Card
For the specification, refer to the specification of respective media.
14-2-3. MultiMediaCard
For the specification, refer to the specification of respective media.
TOTAL 125
PAGE NO. 109
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
14-3. Setup Time
14-3-1. Toshiba 128MB SmartMediaTM
Power Down to Active (Typ.) Power on to Ready (Typ.) Change zone to zone (Typ.) 700s 260ms 50 ms
14-3-2. Matsushita 64MB SD Memory Card
Power Down to Active (Typ.) Power on to Ready (Typ.) 700s 340ms
14-3-3. SanDisk 16MB MultiMediaCard
Power Down to Active (Typ.) Power on to Ready (Typ.) 700s 250ms
Note: Media Transfer Rate listed above are actual measurement results. Note that values may depend on individual media and environment (PC). If customers describe such kind of data on their catalogue, use those based on their own measurements.
14-4. PC Card ATA Power Consumption of TC6374AF
Reference value will be described in the "Information sheet".
Note: The reference value of the power consumption varies by media, hardware or PC settings. Be sure to measure power consumption data by yourself.
TOTAL 125
PAGE NO. 110
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
14-5. MTBF
14-5-1. SmartMediaTM
MTBF is calculated viewing not the physical aspect but logical aspect of the rewrite count limitation. thus using the formula below. MTBF = block count x rewrite count x rate of rewrite portion to the total capacity average sector count written per hour (1 sector = 512 bytes)
Note: Rewrite portion to the total capacity is defined as the area, which is derived by excluding the portion of unrewritable area from the total area since program area has less possibility of rewriting if once written. In case, for example, where card capacity is 4 Mbytes and write accesses of 32 kbytes(64 sectors) per 5 minutes occur, and 30% of the total capacity is rewritten, MTBF is derived as follows: MTBF = (512 x 1,000,000 x 0.3)/(64 x 12) = 200,000 times Even if write access increases up to five times, the device life time reaches 40,000 hours. If such MTBF is insufficient, the device lifetime may be prolonged by rewriting regularly the area, such as program area, in which rewriting occurs less frequently. With this way, "rate of rewrite portion to the total capacity" comes close to 100% in the above formula.
14-5-2. SD Memory Card/MultiMediaCard
For this specification, refer to the specification on respective media.
14-6. ECC
14-6-1. SmartMediaTM
44 bits/Sector (error correction of 1 bit and error detection of 2 bits are available)
14-6-2. SD Memory Card/MultiMediaCard
ECC processes are performed by SD Memory Card/MultiMediaCard controller. For this specification, refer to the specification on respective media.
14-7. Reliability
14-7-1. SmartMediaTM
1/10 bits Read
15
14-7-2. SD Memory Card/MultiMediaCard
For this specification, refer to the specification on respective media.
TOTAL 125
PAGE NO. 111
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
15. Absolute maximum ratings (VSS = 0V)
Item Symbol
Power supply voltage Input voltage Output voltage Input current Storage temperature
VDD VDD3.3 VINVDD VINVDD3.3 VOUTVDD VOUTVDD3.3 IIN Tstg
Specification Max. Min. -0.3 +6.0 -0.3 +4.5 -0.3 VDD+0.3 -0.3 VDD3.3+0.3 -0.3 VDD+0.3 -0.3 VDD3.3+0.3 -10 +10 -40 +125
Unit
V V V mA C
16. Standard operation condition (VSS = 0V) )
Item Symbol
Power supply voltage Ambient tempareture
VDD VDD3.3 Ta
Specification Min. Max. 4.5 5.5 3.0 3.6 -25 +70
Unit
V C
TOTAL 125
PAGE NO. 112
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
17. DC electrical characteristic
Symbol Item Level high input voltage LVTTL LVTTL Schmitt trigger Level low input voltage LVTTL LVTTL Schmitt trigger Level high input current (5V interface) With pull-down resistor Level high input current (3V interface) With pull-down resistor Level low input current (5V interface) With pull-up resistor Level low input current (3V interface) With pull-up resistor Level high output voltage VOHB B4 VOHB B8 VOHA B8IF VOHA/ VOHB Level low output voltage VOLB B4 VOLB B8 VOLA B8IF VOLA/ VOLB Output leak current Condition Min. Specification Typ. Max. Unit
VIH
2.0 2.0 0.8 0.8 10 200 10 200 10 -10 10 -10
V
VIL
V
VINA = VDD VINB = VDD3.3 VINA = VSS VINB = VSS IOH=-4mA IOH=-8mA IOH=-8mA IOH = -1A IOL=4mA IOL=8mA IOL=8mA IOL = 1A VOUTA=VDD or VSS, VOUTB= VDD3.3 or VSS
IIH
IIL
-10 10 -10 10 -10 -200 -10 -200 2.4 VDD-0.05
A
A
VOH
V
VOL
0.4 VSS+0.05 -10 10
V
IOZ
A
VH
Hysteresis voltage LVTTL
0.4 VINA=VDD or VSS , VINB= VDD3.3 or VSS 142
V
IDDS
Static current consumption
A
TOTAL 125
PAGE NO. 113
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18. AC characteristics
18-1. PC Card interface
18-1-1. Attribute memory and common memory write/read timing
Item Symbol Specification Min. Max. 250 150 30 180 180 80 30 30 100 100 5 5 10 10 0 20 300 300 300 150 100 5 0 30 20 0 20 Unit
Write Cycle Time Write Puls Width Address Setup Time Address Setup Time for #WE Card Enable Setup Time for #WE Data Setup Time for #WE Data Hold Time Writre Recover Time Output Disable Time from #WE Output Disable Time from #OE Output Enable Time from #WE Output Enable Time from #OE Output Enable Setup from #WE Output Enable Setup from #OE Card Enable Setup Time Card Enable Hold Time Read Cycle Time Address Access Time Card Enable Access Time Output Enable Access Time Output Disable Time from #OE Output Enable Time from #OE Data Valid from Address Change Address Setup Time Address Hold Time Card Enable Setup Time Card Enable Hold Time
tc tw(WE) tsu(A) tsu(A-WEH) tsu(CE-WEH) tsu(D-WEH) th(D) trec(WE) tdis(WE) tdis(OE) ten(WE) ten(OE) tsu(OE-WE) th(OE-WE) tsu(CE) th(CE) tcR ta(A) ta(CE) ta(OE) tdis(OE) ten(OE) tv(A) tsu(A) th(A) tsu(CE) th(CE)
ns
ns
Note: For timing diagram, refer to PC CARD ELECTRICAL SPECIFICATION.
TOTAL 125
PAGE NO. 114
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-1-2. I/O write/ read timing
Item Symbol Specification Min. Max. 60 30 165 70 20 5 20 5 0 35 35 100 0 165 70 20 5 20 5 0 0 45 45 35 35 Unit
Data Setup before #IOWR Data Hold following #IOWR #IOWR Witdh Time Address Setup before #IOWR Address Hold following #IOWR #CE Setup before #IOWR #CE Hold following #IOWR #REG Setup before #IOWR #REG Hold following #IOWR #IOIS16 Delay Falling from Address #IOIS16 Delay Rising from Address Data Delay after #IORD Data Hold following #IORD #IORD Witdh Time Address Setup before #IORD Address Hold following #IORD #CE Setup before #IORD #CE Hold following #IORD #REG Setup before #IORD #REG Hold following #IORD #INPACK Delay Falling from #IORD #INPACK Delay Rising from #IORD #IOIS16 Delay Falling from Address #IOIS16 Delay Rising from Address
tsu(IOWR) th(IOWR) twIOWR tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tsuREG(IOWR) thREG(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) td(IORD) th(IORD) twIORD tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tsuREG(IORD) thREG(IORD) tdfINPACK(IORD) tdrINPACK(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR)
ns
ns
Note: For timing diagram, refer to PC CARD ELECTRICAL SPECIFICATION.
TOTAL 125
PAGE NO. 115
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-2. SmartMediaTM interface
18-2-1. SmartMediaTM write timing
Item Symbol Specification Min. Max. 50 50 50 50 50 50 50 50 50 100 50 205 Unit
FCLE Setup Time FCLE Hold Time #FCE Setup Time #FCE Hold Time #FWE Pulse Width FALE Setup Time FALE Hold Time Data Setup Time Data Hold Time Write Cycle Time #FWE High Hold Time #FWE High to #FBSY
tCLS tCLH tCS tCH tWP tALS tALH tDS tDH tWC tWH tWB
ns
Note: For the timing diagram, refer to the SmartMediaTM Electric Specification.
18-2-2. SmartMediaTM read timing
Item Symbol Specification Min. Max. 150 60 100 50 50 120 25 70 205 Unit
Ready to #FRE Low Read Pulse Time Read Cycle Time #FRE Access Time (Serial Data Access) #FRE Access Time (Status Read) #FRE Access Time (ID Read) #FRE High Hold Time #FWE High to #FRE Low Last #FRE High to #FBSY
tRR tRP tRC tREA tRSTO tREAID tREH tWHR tRB
ns
Note: For the timing diagram, refer to the SmartMediaTM Electric Specification.. SmartMediaTM has no timing restriction on tR, tCRY, tBERASE, tPROG, tBERS.
TOTAL 125
PAGE NO. 116
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-3. SD Memory Card/ MultiMediaCard interface
Item Symbol PP fOD tWL tWH tTLH tTHL tISU tIH tODLY Specification Min. Max. 16 250 24 24 10 10 10 20 14 Unit
Clock Frequency Data Transfer Mode Clock Frequency Identification Mode Clock Low Time Clock High Time Clock Rise Time Clock Fall Time Input Setup Time Input Hold Time Output Delay Time
MHz kHz
ns
Note: For timing diagram, refer to the specification of each media.
TOTAL 125
PAGE NO. 117
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-4. NOR flash memory interface
18-4-1. Fujitsu (AMD) NOR flash memory interface
Item Symbol Spec. Min. 120 0 50 50 0 0 10 0 0 0 0 0 50 50 30 30 120 Max. Unit
Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Output Enable Hold Time Read Recovery Time #NOR_CE Setup Time #NOR_WE Setup Time #NOR_CE Hold Time #NOR_WE Hold Time #NOR_WE Pulse Witdh #NOR_CE Pulse Witdh #NOR_WE Pulse Witdh High #NOR_CE Pulse Witdh High Read Cycle Time Address Access Time Data Output from #NOR_CE Data Output from #NOR_OE Data Output Flowting from #NOR_CE DATA Output Flowting from #NOR_OE Output Hold Time
TWC TAS TAH TDS TDH TOES TOEH TGHW(E)L TCS TWS TCH TWH TWP TCP TWPH TCPH TRC TACC TCE TOE TDF TDF TOH
ns
120 120 50 30 30 0
ns
Note: For timing diagram, refer to the specification of each media.
TOTAL 125
PAGE NO. 118
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-4-2. Sharp (Intel) NOR flash memory interface
Item Symbol Spec. Min. Max. 150 1 10 50 50 50 5 5 10 30 100 0 150 150 150 600 55 0 55 0 25 0 Unit
Write Cycle Time #NOR_RP High Recovery to #NOR_WE Going Low #NOR_CE Setup to #NOR_WE Going Low #NOR_WE Pulse Witdh Address Setup to #NOR_WE Going High Data Setup to #NOR_WE Going High Data Hold from #NOR_WE High Address Hold from #NOR_WE High #NOR_CE Hold from #NOR_WE High #NOR_WE Pulse Witdh #NOR_WE High to #NOR_BSY Going Low Write Recovery before Read Read Cycle Time Address to Output Delay #NOR_CE to Output Delay #NOR_RP high to Output Delay #NOR_OE to Output Delay #NOR_CE to Output in Low Z #NOR_CE High to Output in High Z #NOR_OE to Output in Low Z #NOR_OE High to Output in High Z Output Hold
tAVAV tPHWL tELWL tWLWH tAVWH tDVWH tWHDX tWHAX tWHEH tWHWL tWHRL tWHGL tAVAV tAVQV tELQV tPHQV tGLQV tELQX tEHQZ tGLQX tGHQZ tOH
ns us
ns
ns
Note: For timing diagram, refer to the specification of each media.
TOTAL 125
PAGE NO. 119
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-5. Clock input condition
Clock input condition for TC6374AF is following.
TC
TP
TF
TN
TR
Symbol
Item
TP TN TR TF TC
"1" Pulse Witdh "0" Pulse Witdh Rising Time Falling Time Cycle Time
Specification Min Max 28 28 5 5 62.5
Unit
ns
TOTAL 125
PAGE NO. 120
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
18-6. Reset input condition
Reset input condition for TC6374AF is following.
RESET
TAW
Item
Symbol
Reset Pulse Width Moreover, refer to "19. Reset sequence"
TAW
Specification Min. Max. 30
Unit
ns
TOTAL 125
PAGE NO. 121
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
19. Reset sequence
VCC
#PONRST
1. PC Card ATA Mode (Normal) RESET
TC6374AF is initialized. 2. PC Card ATA Mode (RESET OPEN) RESET OPEN
TC6374AF is initialized. 3. PC Card ATA Mode (RESET) RESET
TC6374AF is initialized.
Note: RESET state is canceled on above "
" timing.
TOTAL 125
PAGE NO. 122
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
20. Package outline
16.0+0.2SQ 14.0+0.2SQ
96 97 65 64
128 1
33 32
1.4+0.1 0.1+0.05
0.10 14.8+0.15 0.6+0.15
TOTAL 125
PAGE NO. 123
1.6MAX
0.8TYP
0.4
0.16+0.07 -0.03
0.08 M
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
This datasheet describes the TC6374AF operation with use of Version 2.50 or upper version of firmware.
*
We are intent on improving quality and reliability, but generally Semiconductor products can be at malfunction and fault. If you are using our Semiconductor products, you are reqested to draw a safety design of the equipmen at buyer's risk not to infringe on other people's lives, boky and property because of Semiconductore products malfunction and problems. For design, we would liketo use within products guarantee after confirmation of the current products specification, and for notices and condition to consider, please use "Handling instructions and request of Toshiba Semiconductor products" and "Semiconductor reliability handbook". Technical information in this document provides typical operation and application of products, does not grant you gurantee or enforcement right against any right in or to our and third-party intellectual property when using it. Contents in this document are subject to change without notice as technology advanced.
*
*
TOTAL 125
PAGE NO. 124
TC6374AF Hardware Datasheet
Rev. 1.22
02/2/15
TC6374AF hardware datasheet revision history
Revision Approval Author Date Note
0.94 1.00
T. Takada T. Takada
K. Naito S. Kawasaki
2001/ 03/07 2001/ 05/18
Issued 5. Pin assignment table: Revised 6-7. Notes on 3in1 PC Card ATA adapter: Revised 13-1. SmartMediaTM: Recognizeable Device ID table Revised 14-4. PC Card ATA Power Consumption of TC6374AF: Revised 15. Absolute maximum ratings: Added 16. Standard operation conditions: Added 17. DC electrical characteristics: Added 20. Package outline: Revised Added commands below: 8-5-1-22. WRITE SECTOR (S) - 30h or 31h 8-5-2-1. CHECK SD EXTENSION - D1h 8-5-2-2. SD HEADER - D2h 8-5-2-3. SD EXECUTE - D3h 8-5-2-4. RETRIEVE RESPONSE - D4h 8-5-2-5. SD DATA OUT - D5h 4. Contents: Page number revised 6-2. Host interface 2: Revised 7-4-4-2-1. Lower byte access: Revised 7-5-2-2. Card Configuration and Status Register: Revised 7-5-2-3. Pin Replacement Register: Revised 8-2. Operation of ATA COMMAND BLOCK REGISTER: Added 8-5-1-4. GET MEDIA STATUS - Dah: Added 8-5-1-8. INITIALIZE DEVICE PARAMETERS - 91h: Added/ Revised 8-5-1-15. SET FEATURES - Efh, Normal Outputs - The case of Subcommand Code is "Ech": Revised value 8-5-2-1. CHECK SD EXTENSION - D1h: Added/ Revised 8-5-2-2. SD HEADER - D2h: Added 12-2. SD Memory Card / MultiMediaCard: Added/ Revised 18-4-2. Sharp (Intel) NOR flash memory interface: Revised Added firmware revision information 7-4-4-1-3. Word Access: Corrected 7-5-3-12. Device Address Register D7 bit: Deleted 12-2. SD Memory Card/ Multimedia Card: Revised
1.01
T. Takada
S. Kawasaki
2001/ 11/30
1.21
T. Takada
K. Naito
2002/ 1/31
1.22
T. Takada
K. Naito
2002/ 2/15
TOTAL 125
PAGE NO. 125

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